The simple test case is: extern int i; void foo(int j) { i = j; } Compile it with options -march=armv5te -mthumb -Os -fpic, gcc generates: foo: ldr r3, .L3 ldr r2, .L3+4 .LPIC0: add r3, pc // A ldr r3, [r3, r2] @ sp needed for prologue str r0, [r3] bx lr .L4: .align 2 .L3: .word _GLOBAL_OFFSET_TABLE_-(.LPIC0+4) .word i(GOT) Compile it with options -march=armv7 -mthumb -Os -fpic, gcc generates: foo: ldr r3, .L3 .align 2 .LPIC0: adr r2, .LPIC0 + 4 // B adds r3, r3, r2 // C ldr r2, .L3+4 ldr r3, [r3, r2] str r0, [r3, #0] bx lr .L4: .align 2 .L3: .word _GLOBAL_OFFSET_TABLE_-(.LPIC0+4) .word i(GOT) The different instructions are marked with A and BC. It is caused by different codes for Thumb2 and Thumb1 in function arm_load_pic_register. Actually for Thumb2 we should generate similar codes as Thumb1.
Subject: Bug 42671 Author: nickc Date: Wed Jan 27 09:19:36 2010 New Revision: 156276 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=156276 Log: PR target/42671 * config/arm/arm.c (arm_load_pic_register): Use the same code sequence with Thumb2 as for Thumb1. * config/arm/arm.md (pic_add_dot_plus_four): Enable this pattern for all Thumb varieties. Modified: trunk/gcc/ChangeLog trunk/gcc/config/arm/arm.c trunk/gcc/config/arm/arm.md
Fixed in trunk with http://gcc.gnu.org/ml/gcc-patches/2010-01/msg01403.html