Bug 38320 - missed movd opcode (32bits mm -> r/m32).
Summary: missed movd opcode (32bits mm -> r/m32).
Status: RESOLVED WONTFIX
Alias: None
Product: gcc
Classification: Unclassified
Component: target (show other bugs)
Version: 4.3.3
: P3 normal
Target Milestone: ---
Assignee: Not yet assigned to anyone
URL:
Keywords:
Depends on:
Blocks:
 
Reported: 2008-11-29 23:57 UTC by Pawel Sikora
Modified: 2009-09-17 09:10 UTC (History)
1 user (show)

See Also:
Host:
Target: x86-gnu-linux
Build:
Known to work: 4.4.0
Known to fail:
Last reconfirmed:


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Description Pawel Sikora 2008-11-29 23:57:10 UTC
#include <mmintrin.h>
int foo( __m64 x )
{
    int y;
    __builtin_memcpy( &y, &x, sizeof( y ) );
    return y;
}

gcc movd.c -O2 -S produces:

foo:    movq    %xmm0, -24(%rsp)
        movl    -24(%rsp), %eax
        ret

while 'movd xmm0, eax' was expected.
Comment 1 H.J. Lu 2008-11-30 00:51:44 UTC
You need -mtune=core to generate "movd %xmm0, %rax". Gcc 4.4 works.
Comment 2 Pawel Sikora 2008-11-30 10:23:49 UTC
(In reply to comment #1)
> You need -mtune=core to generate "movd %xmm0, %rax". Gcc 4.4 works.

is movd faster only on core2 architecture?
and what about 32-bits?

$ /opt/gcc44/bin/gcc movd.c -O2 -S -march=core2 -m32

foo:    pushl   %ebp
        movl    %esp, %ebp
        subl    $16, %esp
        movq    %mm0, -16(%ebp)        <===? movd mm0, eax
        movl    -16(%ebp), %eax        <===/
        leave
        ret
Comment 3 Uroš Bizjak 2008-11-30 11:43:45 UTC
(In reply to comment #2)

> and what about 32-bits?

The quote from i386.c:

  /* ??? This is a lie.  We do have moves between mmx/general, and for
     mmx/sse2.  But by saying we need secondary memory we discourage the
     register allocator from using the mmx registers unless needed.  */
  if (MMX_CLASS_P (class1) != MMX_CLASS_P (class2))
    return true;
Comment 4 Uroš Bizjak 2009-09-17 09:10:03 UTC
The problem from Comment #2 won't be fixed. Too little gain for too much pain. And %mm registers are evil as they alias x87 regs.