Bug 32982 - config/i386/i386.h rbx and rdx dwarf register numbers are switched.
Summary: config/i386/i386.h rbx and rdx dwarf register numbers are switched.
Status: RESOLVED INVALID
Alias: None
Product: gcc
Classification: Unclassified
Component: target (show other bugs)
Version: unknown
: P3 normal
Target Milestone: ---
Assignee: Not yet assigned to anyone
URL:
Keywords: ABI
Depends on:
Blocks:
 
Reported: 2007-08-03 21:47 UTC by Nurdin Premji
Modified: 2007-08-03 22:13 UTC (History)
1 user (show)

See Also:
Host:
Target: x86_64-linux-gnu
Build:
Known to work:
Known to fail:
Last reconfirmed:


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Description Nurdin Premji 2007-08-03 21:47:35 UTC
according to www.linux-foundation.org/spec/refspecs/elf/x86_64-SysV-psABI.pdf
the registers should be in the order rax, rbx, rcx, rdx, gcc puts them in rax, rdx, rcx, rbx.
Comment 1 Andrew Pinski 2007-08-03 21:51:15 UTC
You have to becareful when fixing this though.  As the unwinder depends on the order and if you change it you change the ABI.
Comment 2 Jakub Jelinek 2007-08-03 22:13:20 UTC
You are looking at obsolete version of the psABI.
Please see
http://www.x86-64.org/viewvc/trunk/x86-64-ABI/low-level-sys-info.tex?revision=214&view=markup
 General Purpose Register RAX & 0 &\RAX\\
 General Purpose Register RDX & 1 &\RDX\\
 General Purpose Register RCX & 2 &\RCX\\
 General Purpose Register RBX & 3 &\RBX\\
 General Purpose Register RSI & 4 &\RSI\\
 General Purpose Register RDI & 5 &\RDI\\
 Frame Pointer Register   RBP & 6 &\RBP\\
 Stack Pointer Register   RSP & 7 &\RSP\\
 Extended Integer Registers 8-15 & 8-15 &\reg{r8}--\reg{r15}\\
 Return Address RA
 & 16&\\
 SSE Registers 0--7              & 17-24 & \reg{xmm0}--\reg{xmm7} \\
 Extended SSE Registers 8--15    & 25-32 & \reg{xmm8}--\reg{xmm15} \\
 Floating Point Registers 0--7   & 33-40 & \reg{st0}--\reg{st7} \\
 MMX Registers 0--7              & 41-48 & \reg{mm0}--\reg{mm7} \\
 Flag Register                   & 49    & \reg{rFLAGS} \\
 Segment Register ES             & 50    & \reg{es} \\
 Segment Register CS             & 51    & \reg{cs} \\
 Segment Register SS             & 52    & \reg{ss} \\
 Segment Register DS             & 53    & \reg{ds} \\
 Segment Register FS             & 54    & \reg{fs} \\
 Segment Register GS             & 55    & \reg{gs} \\
 Reserved                        & 56-57 & \\
 FS Base address                 & 58    & \reg{fs.base} \\
 GS Base address                 & 59    & \reg{gs.base} \\
 Reserved                        & 60-61 & \\
 Task Register                   & 62    & \reg{tr} \\
 LDT Register                    & 63    & \reg{ldtr} \\
 128-bit Media Control and Status & 64   & \reg{mxcsr} \\
 x87 Control Word                & 65    & \reg{fcw} \\
 x87 Status Word                 & 66    & \reg{fsw} \\

http://www.x86-64.org/viewvc/trunk/x86-64-ABI/low-level-sys-info.tex?r1=164&r2=165&view=patch