The SH port internally uses fixed register numbers for MACH/MACL and the floating point registers, which are only appropriate for big endian. This prevents using SImode subregs of DFmode registers, and referring to a 64 bit multiplication result in MACH/MACL as DImode. The register numbering should be changed so that the registers always appear in the same endianness as memory, and inasmuch as they only exist because of the wrong-numbered registers, pattern and register class anomalies removed and CLASS_CANNOT_CHANGE_MODE made to return 0 whenever possible. This should allow to make best use of the rtl optimizers.