Some GCC tests such as gcc.c-torture/execute/simd-5.c fail on powerpc-none-eabispe with an ICE in final_scan_insn (not optimizing) or reload_cse_simplify_operands (optimizing). This happens with trunk and 4.1 branch but not with 4.0 branch. Reduced testcase: typedef short Q __attribute__((vector_size(8))); Q a, b, c; void f (void) { c = a * b; } Non-optimizing: t.c: In function 'f': t.c:9: error: insn does not satisfy its constraints: (insn 45 74 75 (set (reg:V4HI 0 0 [158]) (mem/u/c/i:V4HI (lo_sum:SI (reg:SI 10 10) (symbol_ref/u:SI ("*.LC0") [flags 0x2])) [0 S8 A64])) 1059 {*movv4hi_internal} (nil) (nil)) t.c:9: internal compiler error: in final_scan_insn, at final.c:2379 Please submit a full bug report, with preprocessed source if appropriate. See <URL:http://gcc.gnu.org/bugs.html> for instructions. With -O: t.c: In function 'f': t.c:9: error: insn does not satisfy its constraints: (insn 18 68 66 2 (set (reg:V4HI 0 0 [127]) (mem/u/c/i:V4HI (lo_sum:SI (reg:SI 6 6) (symbol_ref/u:SI ("*.LC0") [flags 0x82])) [0 S8 A64])) 1059 {*movv4hi_internal} (nil) (nil)) t.c:9: internal compiler error: in reload_cse_simplify_operands, at postreload.c:393 Please submit a full bug report, with preprocessed source if appropriate. See <URL:http://gcc.gnu.org/bugs.html> for instructions.
Will not be fixed in 4.1.1; adjust target milestone to 4.1.2.
Confirmed.
We have before reload: (insn 45 44 46 3 (set (reg:V4HI 131 [ D.1754 ]) (const_vector:V4HI [ (const_int 0 [0x0]) (const_int 0 [0x0]) (const_int 0 [0x0]) (const_int 0 [0x0]) ])) 933 {*movv4hi_internal} (nil) (nil)) Which then gets turned into: (insn 73 44 45 3 (set (reg:SI 10 10) (high:SI (symbol_ref/u:SI ("*.LC0") [flags 0x2]))) 319 {elf_high} (nil) (nil)) (insn 45 73 74 3 (set (reg:V4HI 0 0 [orig:131 D.1754 ] [131]) (mem/u/c/i:V4HI (lo_sum:SI (reg:SI 10 10) (symbol_ref/u:SI ("*.LC0") [flags 0x2])) [0 S8 A64])) 933 {*movv4hi_internal} (nil) (nil)) Which is normally fine except for the fact V4HI memory only accepts reg+reg and not reg+imm.
rs6000_legitimate_offset_address_p() accepts constant offsets: case V4HImode: case V2SImode: case V1DImode: case V2SFmode: /* SPE vector modes. */ return SPE_CONST_OFFSET_OK (offset); It actually probably should allow any constant offset when not strict, but this needs a legitimize_reload_address stanza to push the addition.
* config/rs6000/rs6000.c (rs6000_legitimize_reload_address): Do not reload a SPE symbol_ref into a lo_sum address. Index: rs6000.c =================================================================== *** rs6000.c (revision 115281) --- rs6000.c (working copy) *************** rs6000_legitimize_reload_address (rtx x, *** 3421,3426 **** --- 3421,3427 ---- if (GET_CODE (x) == SYMBOL_REF && !ALTIVEC_VECTOR_MODE (mode) + && !SPE_VECTOR_MODE (mode) #if TARGET_MACHO && DEFAULT_ABI == ABI_DARWIN && (flag_pic || MACHO_DYNAMIC_NO_PIC_P)
Subject: Bug 27566 Author: dje Date: Thu Aug 3 13:48:01 2006 New Revision: 115902 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=115902 Log: PR target/27566 * config/rs6000/rs6000.c (rs6000_legitimize_reload_address): Do not reload a SPE symbol_ref into a lo_sum address. Modified: trunk/gcc/ChangeLog trunk/gcc/config/rs6000/rs6000.c
Subject: Bug 27566 Author: dje Date: Thu Aug 3 18:36:28 2006 New Revision: 115909 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=115909 Log: PR target/27566 * config/rs6000/rs6000.c (rs6000_legitimize_reload_address): Do not reload a SPE symbol_ref into a lo_sum address. Modified: branches/gcc-4_1-branch/gcc/ChangeLog branches/gcc-4_1-branch/gcc/config/rs6000/rs6000.c
Patch applied to mainline and 4.1 branch.