GCC produced this ICE when the attached program was compiled. I tried the fix from http://gcc.gnu.org/PR18641 but it did not fix the problem. commandline options -O2 -msoft-float -m64 -c gcc output ================================= a.c: In function `do_select': a.c:12770: error: unable to find a register to spill in class `FLOAT_REGS' a.c:12770: error: this is the insn: (insn:HI 355 353 357 27 (set (mem/s:DI (plus:DI (reg/f:DI 31 31) (const_int 149 [0x95])) [4 fs_event.event_data2+0 S8 A8]) (reg/v:DI 125 [ __timeout ])) 322 {*movdi_internal64} (nil) (nil)) a.c:12770: confused by earlier errors, bailing out
Created attachment 8907 [details] testcase
Fails with 3.4.4 too
Alan, Andrew, If any one of you have setup with gcc-4.0 handy, could you verify if this bug exists there as well?
This was really fixed on the mainline by: 2005-01-07 David Edelsohn <edelsohn@gnu.org> PR target/13674 * config/rs6000/rs6000.c (rs6000_legitimize_reload_address): Convert non-word aligned offset address using ld/std into indirect address. There is a work around on the 3.4 branch which looks like it is not working for this case for some reason.
The work around for PR 13674 in the 3.4 branch is trying to use a FP register as that is what the work around says to do.
Thanks Andrew. [17:00] <ngupta> pinskia, yes I am trying to get an answer if PR21616 existed on gcc-4.0 :) [17:01] <pinskia> it might be worked around by optimizing it better :) [17:01] <ngupta> I suspect its already fixed in rs6000.md, but dont want to go over the whole setup thingie [17:02] <pinskia> let me try it [17:02] <ngupta> than I rather backport that from gcc-4.0 [17:05] <pinskia> did you try the patch for PR 15286? [17:07] <ngupta> nope, lemme look [17:08] <pinskia> oh, that will not help [17:08] <pinskia> I know which bug this is, it has to do with ld not taking any old offset but only aligned offsets [17:08] <pinskia> let me find that patch [17:08] <-- rosalesa has quit ("Leaving") [17:13] <ngupta> oh ok, i m waiting [17:14] --> jk- (~jk@toolbox.otago.ac.nz) has joined #ppc64 [17:14] <pinskia> ngupta: the patch for PR 13674 is the one which really fixed the problem I think [17:15] <pinskia> there is a workaround on the 3.4 branch for PR 13674 but it looks like it does not work for this testcase :( [17:16] <ngupta> yup, thats what I was abt to try [17:16] <ngupta> -fnew-ra [17:17] <pinskia> in fact I think the work around is causing the ICE to show up, it is trying to use FP register because that is what the work around says to use [17:19] <ngupta> so back to, could u try gcc-4.0 [17:20] <pinskia> I did and it worked [17:20] <ngupta> I have started a build with this patch anyway [17:20] <pinskia> you might need to revert the work around though [17:20] <ngupta> oh ok, u mean patch for PR13674? [17:21] <pinskia> the one which is on the 3.4 branch yes [17:22] <ngupta> ok, got it [17:22] <ngupta> thx, will update the bug after testing it [17:24] <pinskia> 2004-03-10 Alan Modra <amodra@bigpond.net.au> [17:24] <pinskia> Hartmut Penner <hpenner@de.ibm.com> [17:25] <ngupta> BTW, I will also CC dje/hpenner on this bug. [17:25] <pinskia> one from http://gcc.gnu.org/ml/gcc-cvs/2004-03/msg00482.html by the way
Andrew, I was able to strip the worksround mentioned in http://gcc.gnu.org/ml/gcc-cvs/2004-03/msg00482.html and apply the patch at PR target/13674 to avoid this bug. If its of interest, I can post a patch for gcc-3.4 . I need to do a little bit of cleanup before that.
Try adding the legitimize_reload_address fragment for unaligned offset from gcc-4.X: /* Force ld/std non-word aligned offset into base register by wrapping in offset 0. */ if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 0)) == REG && REGNO (XEXP (x, 0)) < 32 && REG_MODE_OK_FOR_BASE_P (XEXP (x, 0), mode) && GET_CODE (XEXP (x, 1)) == CONST_INT && (INTVAL (XEXP (x, 1)) & 3) != 0 && !ALTIVEC_VECTOR_MODE (mode) && GET_MODE_SIZE (mode) >= UNITS_PER_WORD && TARGET_POWERPC64) { x = gen_rtx_PLUS (GET_MODE (x), x, GEN_INT (0)); push_reload (XEXP (x, 0), NULL_RTX, &XEXP (x, 0), NULL, BASE_REG_CLASS, GET_MODE (x), VOIDmode, 0, 0, opnum, (enum reload_type) type); *win = 1; return x; }
Created attachment 10817 [details] Patch against current 3.4 sources
(In reply to comment #9) > Created an attachment (id=10817) [edit] > Patch against current 3.4 sources > Could you get it reviewed by the appropriate maintainer?
Subject: Re: [3.4 only] ICE: unable to find a register to spill in class `FLOAT_REGS' If Alan and Gaby want the patch backported to GCC 3.4 branch, it's okay with me. The patch is fine.
Subject: Bug 21616 Author: amodra Date: Wed Mar 1 01:04:29 2006 New Revision: 111592 URL: http://gcc.gnu.org/viewcvs?root=gcc&view=rev&rev=111592 Log: PR target/21616 Revert most of 2004-03-10 changes, apply mainline 2005-01-07. * config/rs6000/rs6000.c (invalid_gpr_mem): Delete. (base_reg_operand): Delete. (legitimate_offset_address_p): Revert 2004-03-10 changes. (secondary_reload_class): Likewise. (rs6000_legitimize_reload_address): Convert non-word aligned offset address using ld/std into indirect address. * config/rs6000/rs6000.h (SECONDARY_RELOAD_CLASS): Define. (SECONDARY_INPUT_RELOAD_CLASS, SECONDARY_OUTPUT_RELOAD_CLASS): Delete. (PREDICATE_CODES): Delete invalid_gpr_mem and base_reg_operand. * config/rs6000/rs6000-protos.h (secondary_reload_class): Update. * config/rs6000/rs6000.md (movdf_hardfloat64): Remove m->b alternative and split. (movdi_internal64): Likewise. (reload_outdf, reload_indf, reload_outdi, reload_indi): Delete. Modified: branches/gcc-3_4-branch/gcc/ChangeLog branches/gcc-3_4-branch/gcc/config/rs6000/rs6000-protos.h branches/gcc-3_4-branch/gcc/config/rs6000/rs6000.c branches/gcc-3_4-branch/gcc/config/rs6000/rs6000.h branches/gcc-3_4-branch/gcc/config/rs6000/rs6000.md
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