* the options given when GCC was configured/built; Configured with: /home/niva/src/gcc-3.4-binutils/configure --with-headers=/home/vxuser/oc2000/mips/src/include --without-libs --enable-generated-files-in-srcdir --enable-threads=posix -with-dwarf2 --disable-shared --target=mips64-none-elf --verbose --enable-checking --enable-languages=c --srcdir=/home/niva/svnwork/src --prefix=/home/niva/local1 --enable-cpp * the complete command line that triggers the bug; ./mips64-none-elf-gcc -O1 -G 0 -mips1 -mabi=32 .c -c -save-temps * the compiler output (error messages, warnings, etc.); No error messages * the preprocessed file (*.i*) struct s { unsigned long long a:8, b:32; }; struct s f(struct s x) { x.b = 0xcdef1234; return x; } main() { static struct s i; i.a = 12; i = f(i); if (i.b != 0xcdef1234) abort(); exit(0); } * the resultant assembler code is .file 1 "930126-2.c" .section .mdebug.abi32 .previous .text .align 2 .globl f .ent f f: .frame $sp,0,$31 # vars= 0, regs= 0/0, args= 0, gp= 0 .mask 0x00000000,0 .fmask 0x00000000,0 .set noreorder .set nomacro move $2,$4 li $3,-16777216 # 0xffffffffff000000 and $6,$6,$3 li $3,13434880 # 0xcd0000 ori $3,$3,0xef12 or $6,$6,$3 li $3,16711680 # 0xff0000 ori $3,$3,0xffff and $7,$7,$3 li $3,872415232 # 0x34000000 or $7,$7,$3 sw $7,4($4) j $31 sw $6,0($4) .set macro .set reorder .end f .lcomm i.0,8 .align 2 .globl main .ent main main: .frame $sp,32,$31 # vars= 0, regs= 4/0, args= 16, gp= 0 .mask 0x800d0000,-4 .fmask 0x00000000,0 .set noreorder .set nomacro addiu $sp,$sp,-32 sw $31,28($sp) sw $19,24($sp) sw $18,20($sp) sw $16,16($sp) lui $16,%hi(i.0) li $2,12 sb $2,%lo(i.0)($16) lw $7,%lo(i.0+4)($16) lw $6,%lo(i.0)($16) jal f addiu $4,$16,%lo(i.0) addiu $3,$16,%lo(i.0+1) lwl $2,%lo(i.0+1)($16) move $19,$2 lwr $19,3($3) move $4,$0 bne $4,$0,$L4 li $2,-839974912 # 0xffffffffcdef0000 ori $2,$2,0x1234 beq $19,$2,$L3 nop $L4: jal abort nop $L3: jal exit move $4,$0 .set macro .set reorder .end main * the error here is that there is no NOP between LWL and the next command that uses the output register of LWL: lwl $2,%lo(i.0+1)($16) move $19,$2 * As a result, the test ends with jump to abort. When I insert the NOP manually to the assembler code, the test passes OK.
Whoops. This was caused by an over-eager optimisation (trying to avoid a nop between lwl and lwr). I'm about to attach a patch.
Created attachment 7257 [details] Suggested patch Could you give this patch a go?
Subject: Re: No NOP after LWL with -mips1 > > ------- Additional Comments From rsandifo at gcc dot gnu dot org 2004-10-01 17:36 ------- > Created an attachment (id=7257) > --> (http://gcc.gnu.org/bugzilla/attachment.cgi?id=7257&action=view) > Suggested patch > > Could you give this patch a go? : Thank you, that's OK.
Subject: Bug 17770 CVSROOT: /cvs/gcc Module name: gcc Branch: gcc-3_4-branch Changes by: rsandifo@gcc.gnu.org 2004-10-07 06:38:48 Modified files: gcc : ChangeLog gcc/config/mips: mips.md Log message: PR target/17770 * config/mips/mips.md (mov_lwl): Remove hazard=none attribute. Patches: http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/ChangeLog.diff?cvsroot=gcc&only_with_tag=gcc-3_4-branch&r1=2.2326.2.646&r2=2.2326.2.647 http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/mips/mips.md.diff?cvsroot=gcc&only_with_tag=gcc-3_4-branch&r1=1.211.4.9&r2=1.211.4.10
Subject: Bug 17770 CVSROOT: /cvs/gcc Module name: gcc Changes by: rsandifo@gcc.gnu.org 2004-10-07 06:41:27 Modified files: gcc : ChangeLog gcc/config/mips: mips.md Log message: PR target/17770 * config/mips/mips.md (mov_<load>l): Remove hazard=none attribute. Patches: http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/ChangeLog.diff?cvsroot=gcc&r1=2.5779&r2=2.5780 http://gcc.gnu.org/cgi-bin/cvsweb.cgi/gcc/gcc/config/mips/mips.md.diff?cvsroot=gcc&r1=1.309&r2=1.310
Patch applied.