In some cases the jump table used for implementing a C switch statement could be
replaced with a jump to a calculated address. This can be done if the jump table
contains an appropriate pattern which can be formulated into a
function/calculation.
A simple example is the case when the code sizes of case blocks are equal and
each case label is addressable with one data processing instruction. In this
case GCC could compute the size of case blocks and multiply them by the switch
condition value and modify pc with this value.
It could also be possible to rearrange the jump table into regions with this
"formulated jumps" mechanism.
GCC should use this mechanism when optimizing for size.

--- example ---
// arm-elf-gcc -S -g0 -Os -o form-jump.s form-jump.c
void func (int);
void foo (int a)
{
  switch(a)
  {
    case 15:
     func(5);
    case 16:
     func(59);
    case 17:
     func(515);
    case 18:
     func(65);
    case 19:
     func(8);
    case 20:
     func(15);
  }
}

--- arm code ---
foo:
 mov ip, sp
 sub r0, r0, #15
 stmfd sp!, {fp, ip, lr, pc}
 sub fp, ip, #4
 cmp r0, #5
 ldrls pc, [pc, r0, asl #2]
 b .L1
 .p2align 2
.L9:
 .word .L3
 .word .L4
 .word .L5
 .word .L6
 .word .L7
 .word .L8
.L3:
 mov r0, #5
 bl func
.L4:
 mov r0, #59
 bl func
.L5:
 ldr r0, .L10
 bl func
.L6:
 mov r0, #65
 bl func
.L7:
 mov r0, #8
 bl func
.L8:
 mov r0, #15
 ldmea fp, {fp, sp, lr}
 b func
.L1:
 ldmea fp, {fp, sp, pc} 

--- possible solution ---
foo:
 mov ip, sp
 sub r0, r0, #15
 stmfd sp!, {fp, ip, lr, pc}
 sub fp, ip, #4
 cmp r0, #5
 addls pc, pc, r0, asl #3
 b .L1
.L3:
 mov r0, #5
 bl func
.L4:
 mov r0, #59
 bl func
.L5:
 ldr r0, .L10
 bl func
.L6:
 mov r0, #65
 bl func
.L7:
 mov r0, #8
 bl func
.L8:
 mov r0, #15
 ldmea fp, {fp, sp, lr}
 b func
.L1:
 ldmea fp, {fp, sp, pc}