Fw: [patch] Make std::tr1::shared_ptr thread-safe.

Paolo Carlini pcarlini@suse.de
Fri Apr 1 16:48:00 GMT 2005


Hi Alexander,

>I know how Intel conforming  __sync_fetch_and_add supposed to work.
>
>I want to see GCC's implementation on IA64 instructions level 
>(effects on compiler reordering aside for a moment).
>  
>
Ok, one thing at a time. I'm compiling on ia64 with gcc mainline this:

int
__attribute__ ((__unused__))
__exchange_and_add(volatile int* __mem, int __val)
{ return __sync_fetch_and_add(__mem, __val); }

and this is what I get (no optimizations):

0000000000000000 <__exchange_and_add>:
   0:   00 18 21 0c 80 05       [MII]       alloc r35=ar.pfs,8,6,0
   6:   40 02 30 00 42 80                   mov r36=r12
   c:   01 67 fc 8c                         adds r12=-16,r12
  10:   0d 28 01 02 00 21       [MFI]       mov r37=r1
  16:   00 00 00 02 00 40                   nop.f 0x0
  1c:   04 00 c4 00                         mov r34=b0;;
  20:   0d 00 80 48 98 11       [MFI]       st8 [r36]=r32
  26:   00 00 00 02 00 c0                   nop.f 0x0
  2c:   81 20 01 84                         adds r14=8,r36;;
  30:   0c 00 84 1c 90 11       [MFI]       st4 [r14]=r33
  36:   00 00 00 02 00 c0                   nop.f 0x0
  3c:   81 20 01 84                         adds r14=8,r36
  40:   0a 30 01 48 18 10       [MMI]       ld8 r38=[r36];;
  46:   70 02 38 20 20 00                   ld4 r39=[r14]
  4c:   00 00 04 00                         nop.i 0x0
  50:   1c 00 00 00 01 00       [MFB]       nop.m 0x0
  56:   00 00 00 02 00 00                   nop.f 0x0
  5c:   08 00 00 50                         br.call.sptk.many b0=50
<__exchange_and_add+0x50>
  60:   02 08 00 4a 00 21       [MII]       mov r1=r37
  66:   e0 00 20 00 42 00                   mov r14=r8;;
  6c:   01 70 00 84                         mov r8=r14
  70:   00 00 00 00 01 00       [MII]       nop.m 0x0
  76:   00 18 01 55 00 00                   mov.i ar.pfs=r35
  7c:   20 0a 00 07                         mov b0=r34
  80:   1d 60 00 48 00 21       [MFB]       mov r12=r36
  86:   00 00 00 02 00 80                   nop.f 0x0
  8c:   08 00 84 00                         br.ret.sptk.many b0;;

(-O2):

0000000000000000 <__exchange_and_add>:
   0:   0a 00 00 00 01 00       [MMI]       nop.m 0x0;;
   6:   30 3a 14 00 0b 40                   alloc r35=ar.pfs,7,5,0
   c:   04 00 c4 00                         mov r34=b0
  10:   09 20 01 02 00 21       [MMI]       mov r36=r1
  16:   50 02 80 00 42 c0                   mov r37=r32
  1c:   04 08 01 84                         mov r38=r33;;
  20:   17 00 00 00 00 08       [BBB]       nop.b 0x0
  26:   00 00 00 00 10 00                   nop.b 0x0
  2c:   08 00 00 50                         br.call.sptk.many b0=20
<__exchange_and_add+0x20>;;
  30:   08 00 00 00 01 00       [MMI]       nop.m 0x0
  36:   10 00 90 00 42 00                   mov r1=r36
  3c:   20 0a 00 07                         mov b0=r34
  40:   11 00 00 00 01 00       [MIB]       nop.m 0x0
  46:   00 18 01 55 00 80                   mov.i ar.pfs=r35
  4c:   08 00 84 00                         br.ret.sptk.many b0;;

Paolo.



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