AIX I/O failures

Mark Mitchell
Thu Jan 25 13:41:00 GMT 2001

  Disclaimer:  I am by no means an expert on the i686 architecture.

Me neither.  

I'm not the world's biggest expert on any architecture, particularly,
but I think this is going to look different on a SPARC, or another
RISC chip, where you don't have the same memory-to-memory instructions
available on an x86.

Mark Mitchell         
CodeSourcery, LLC     

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