[gcc r17-5553] Daily bump.
GCC Administrator
gccadmin@gcc.gnu.org
Sun Oct 25 00:17:22 GMT 2026
https://gcc.gnu.org/g:cd7a85774a992c4759ebd03a26ce03cbb934e4d9
commit r17-5553-gcd7a85774a992c4759ebd03a26ce03cbb934e4d9
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Sun Oct 25 00:16:41 2026 +0000
Daily bump.
Diff:
---
gcc/ChangeLog | 106 ++++++++++++++++++++++++++++++++++++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/fortran/ChangeLog | 28 +++++++++++++
gcc/testsuite/ChangeLog | 101 +++++++++++++++++++++++++++++++++++++++++++++
libgcc/ChangeLog | 10 +++++
libstdc++-v3/ChangeLog | 5 +++
6 files changed, 251 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b4d9388a8e6d..2564476041a8 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,109 @@
+2026-10-24 Robert Dubner <rdubner@symas.com>
+
+ * doc/install.texi: Configure.html documentation for
+ --enable-libgcobol-rpath
+
+2026-10-24 Gerald Pfeifer <gerald@pfeifer.com>
+
+ * doc/invoke.texi (AArch64 Options): Improve markup
+ for -mcmodel=large.
+
+2026-10-24 Andrea Pinski <andrew.pinski@oss.qualcomm.com>
+
+ * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Handle non-empty
+ middle bbs for diamond case.
+ (match_simplify_replacement): Mark phi args to be maybe dce'd also.
+
+2026-10-24 Igor Shevlyakov <igor@tachyum.com>
+
+ PR middle-end/127785
+ * match.pd ((ordered @0 @1) & (ne @0 @1)): Remove.
+
+2026-10-24 Igor Shevlyakov <igor@tachyum.com>
+
+ PR middle-end/127785
+ * match.pd ((ordered @0 @1) & (ne @0 @1)): Only fold to LTGT
+ without trapping math or when NaNs are not honored.
+
+2026-10-24 Igor Shevlyakov <igor@tachyum.com>
+
+ PR tree-optimization/128080
+ * match.pd (vec_perm (vec_perm) merges): Give the new mask
+ ssizetype elements.
+
+2026-10-24 Jeff Law <jeffreyalaw@gmail.com>
+
+ * config/riscv/andes.md (branch-on-bit pattern): Reference the forward
+ label correctly in the long branch sequence.
+ * config/riscv/peephole.md: Require operands to be a REG before asking
+ for the REGNO.
+
+2026-10-24 Stian Halseth <stian@itx.no>
+
+ PR target/128091
+ * common/config/sparc/sparc-common.cc
+ (sparc_option_optimization_table)
+ [TARGET_DEFAULT_ASYNC_UNWIND_TABLES]: Enable
+ -fasynchronous-unwind-tables and -funwind-tables.
+ * config.gcc (sparc64-*-linux*): Define
+ TARGET_DEFAULT_ASYNC_UNWIND_TABLES.
+
+2026-10-24 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/128082
+ * tree-ssa-sccvn.cc (pass_fre::execute): Use LOOPS_NORMAL
+ to force simple latches.
+
+2026-10-24 Tamar Christina <tamar.christina@arm.com>
+
+ * config/aarch64/driver-aarch64.cc (DEFAULT_ARCH, DEFAULT_CPU):
+ Remove.
+ (get_cpu_from_ext): New function. Select a generic CPU using
+ SVE2 and extensions that depend on it.
+ (host_detect_local_cpu): Use the inferred generic CPU and its
+ architecture for unknown CPUs, including heterogeneous systems.
+ Limit inherited features without cpuinfo tokens to the Armv8-A
+ baseline when the CPU is unknown.
+
+2026-10-24 Tamar Christina <tamar.christina@arm.com>
+
+ * config/aarch64/aarch64.cc (aarch64_ifn_vect_stmt_p): Rename to...
+ (aarch64_vect_stmt_cost): ...this. Accept a fractional_cost and
+ return the adjusted statement cost instead of an additional
+ instruction count.
+ (aarch64_vector_costs::count_ops): Pass a unit cost and scale and
+ round the extra operation count after applying count.
+ (aarch64_vector_costs::add_stmt_cost): Use the adjusted statement
+ cost and leave count scaling to record_stmt_cost.
+
+2026-10-24 Tamar Christina <tamar.christina@arm.com>
+
+ * config/aarch64/aarch64-sve.md (vec_extract<mode><Vel>): Call
+ gen_extract_last_active_<mode>.
+ (@extract_<last_op>_<mode>): Generate extract_last_active_<mode>
+ for UNSPEC_LASTB through the last_op attribute.
+ * config/aarch64/iterators.md (last_op): Change the UNSPEC_LASTB
+ mapping from last to last_active.
+ * config/gcn/gcn-valu.md (extract_last_<mode>): Rename to...
+ (extract_last_active_<mode>): ...this.
+ (fold_extract_last_<mode>): Call gen_extract_last_active_<mode>.
+ * doc/ifn.texi (IFN_EXTRACT_LAST): Rename to IFN_EXTRACT_LAST_ACTIVE
+ and update the corresponding pattern name.
+ * doc/md.texi (extract_last_m): Rename to extract_last_active_m.
+ * internal-fn.def (EXTRACT_LAST): Rename to EXTRACT_LAST_ACTIVE and
+ use the extract_last_active optab.
+ * optabs.def (extract_last_optab): Rename to
+ extract_last_active_optab and use the extract_last_active pattern.
+ * tree-vect-loop.cc (vectorizable_live_operation_1): Emit
+ CFN_EXTRACT_LAST_ACTIVE and update the comment.
+ (vectorizable_live_operation): Check IFN_EXTRACT_LAST_ACTIVE support.
+
+2026-10-24 Pan Li <pan2.li@intel.com>
+
+ * config/riscv/vector.md: Take the Wn4 constraint for the
+ operand 3 and the Wvr constraint for the operand 4 of the
+ vfwsub.wv.
+
2026-10-23 Jeff Law <jeffreyalaw@gmail.com>
* config/riscv/crypto.md (riscv_xpack_<code>_<X:mode>_<HX:mode>_2):
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index e39ba340ae10..01341cfb1f0d 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20261024
+20261025
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index dc9f9b4a9ff1..436079d31fce 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,31 @@
+2026-10-24 Jerry DeLisle <jvdelisle@gcc.gnu.org>
+
+ PR fortran/126798
+ * resolve.cc (resolve_assoc_var): Move the procedure pointer check
+ out of the EXPR_VARIABLE branch and diagnose a function reference
+ whose result is a procedure pointer.
+
+2026-10-24 Jerry DeLisle <jvdelisle@gcc.gnu.org>
+
+ * resolve.cc (resolve_variable): Do not call gfc_fix_class_refs
+ for an inferred-type reference.
+
+2026-10-24 Thomas Koenig <tkoenig@gcc.gnu.org>
+
+ PR fortran/128124
+ * gfortran.texi: Note that LEADZ, POPCNT, POPPAR and TRAILZ take
+ unsigned arguments.
+ * intrinsic.cc (add_functions): LEADZ and TRAILZ also take unsigned
+ arguments.
+ * intrinsic.texi: Document unsigned arguments for LEADZ, POPCNT, POPPAR
+ and TRAILZ.
+
+2026-10-24 Harald Anlauf <anlauf@gmx.de>
+
+ PR fortran/128067
+ * module.cc (load_needed): Prevent scanning of empty name for
+ prefix "__".
+
2026-10-23 Jerry DeLisle <jvdelisle@gcc.gnu.org>
PR fortran/127731
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 168c96636472..a05d4c283dc7 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,104 @@
+2026-10-24 John David Anglin <danglin@gcc.gnu.org>
+
+ * gcc.dg/fwrite-3.c: Restrict fputc_unlocked tree dump scan to
+ exclude hppa*-*-hpux* targets.
+
+2026-10-24 John David Anglin <danglin@gcc.gnu.org>
+
+ * gcc.dg/diagnostic-cfgs.c: Add dg-prune-output for missing
+ 'dot' executable errors.
+
+2026-10-24 Jerry DeLisle <jvdelisle@gcc.gnu.org>
+
+ PR fortran/126798
+ * gfortran.dg/associate_85.f90: New test.
+
+2026-10-24 John David Anglin <danglin@gcc.gnu.org>
+
+ * gcc.dg/debug/dwarf2/pr126355.c: Adjust scan-assembler regex
+ to accommodate HPPA trailing assembler comment layout.
+
+2026-10-24 Igor Shevlyakov <igor@tachyum.com>
+
+ PR middle-end/127785
+ * gcc.dg/opt-ordered-and-nonequal-1.c: Add -fno-trapping-math and
+ scan the optimized dump.
+ * gcc.dg/opt-ordered-and-nonequal-2.c: New test.
+ * gcc.dg/torture/cmp-of-cmp-fenv-1.c: New test.
+ * gcc.target/i386/opt-comi-1.c: Add -fno-trapping-math.
+ * gcc.target/i386/avx10_2-compare-1b.c: Likewise.
+
+2026-10-24 Igor Shevlyakov <igor@tachyum.com>
+
+ PR tree-optimization/128080
+ * gcc.dg/torture/pr128080.c: New test.
+ * gcc.dg/torture/pr128080-2.c: New test.
+
+2026-10-24 Jerry DeLisle <jvdelisle@gcc.gnu.org>
+
+ * gfortran.dg/associate_92.f90: New test.
+
+2026-10-24 David Malcolm <dmalcolm@redhat.com>
+
+ * lib/gcov.exp (run-gcov-pytest): Drop excess non-newline pattern
+ after parentheses in regexps.
+ * lib/scanhtml.exp (run-html-pytest): Likewise.
+ * lib/scansarif.exp (run-sarif-pytest): Likewise.
+
+2026-10-24 Thomas Koenig <tkoenig@gcc.gnu.org>
+
+ PR fortran/128124
+ * gfortran.dg/unsigned_45.f90: New test.
+
+2026-10-24 Matt Turner <mattst88@gmail.com>
+
+ * gcc.target/ia64/sigaltstack-unwind-1.c: New test.
+
+2026-10-24 Stian Halseth <stian@itx.no>
+
+ PR target/128091
+ * gcc.dg/stack-layout-dynamic-1.c: Do not scan for
+ cfi_def_cfa_register on sparc64 Linux.
+
+2026-10-24 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/128082
+ * gcc.dg/tree-ssa/ssa-fre-67.c: Adjust.
+
+2026-10-24 Tamar Christina <tamar.christina@arm.com>
+
+ * gcc.target/aarch64/cpunative/native_cpu_16.c: Update the expected
+ architecture and extensions for the generic Armv9 fallback.
+ * gcc.target/aarch64/cpunative/native_cpu_17.c: Likewise.
+ * gcc.target/aarch64/cpunative/native_cpu_34.c: Likewise.
+ * gcc.target/aarch64/cpunative/info_37: New cpuinfo fixture for an
+ unknown CPU with SVE2.1 and missing Armv9 baseline features.
+ * gcc.target/aarch64/cpunative/info_38: New cpuinfo fixture for an
+ unknown CPU without SVE2.
+ * gcc.target/aarch64/cpunative/info_41: New cpuinfo fixture for an
+ unknown CPU with SVE2 and all reportable Armv9-A baseline features.
+ * gcc.target/aarch64/cpunative/native_cpu_37.c: New test.
+ * gcc.target/aarch64/cpunative/native_cpu_38.c: New test.
+ * gcc.target/aarch64/cpunative/native_cpu_39.c: New test.
+ * gcc.target/aarch64/cpunative/native_cpu_40.c: New test.
+ * gcc.target/aarch64/cpunative/native_cpu_41.c: New test.
+
+2026-10-24 Pan Li <pan2.li@intel.com>
+
+ * gcc.target/riscv/rvv/base/pr112431-60.c: New test.
+
+2026-10-24 Pan Li <pan2.li@intel.com>
+
+ * gcc.target/riscv/rvv/autovec/group_overlap/vfwsub_wv-f16-m1.c: New test.
+ * gcc.target/riscv/rvv/autovec/group_overlap/vfwsub_wv-f16-m2.c: New test.
+ * gcc.target/riscv/rvv/autovec/group_overlap/vfwsub_wv-f16-m4.c: New test.
+ * gcc.target/riscv/rvv/autovec/group_overlap/vfwsub_wv-f16-mf2.c: New test.
+ * gcc.target/riscv/rvv/autovec/group_overlap/vfwsub_wv-f16-mf4.c: New test.
+ * gcc.target/riscv/rvv/autovec/group_overlap/vfwsub_wv-f32-m1.c: New test.
+ * gcc.target/riscv/rvv/autovec/group_overlap/vfwsub_wv-f32-m2.c: New test.
+ * gcc.target/riscv/rvv/autovec/group_overlap/vfwsub_wv-f32-m4.c: New test.
+ * gcc.target/riscv/rvv/autovec/group_overlap/vfwsub_wv-f32-mf2.c: New test.
+
2026-10-23 Igor Shevlyakov <igor@tachyum.com>
* gcc.dg/tree-ssa/forwprop-vec-cond-float.c: Check the conversion
diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog
index eac2174c589c..8379fbd643a5 100644
--- a/libgcc/ChangeLog
+++ b/libgcc/ChangeLog
@@ -1,3 +1,13 @@
+2026-10-24 Matt Turner <mattst88@gmail.com>
+
+ * config/ia64/unwind-ia64.c (ia64_copy_rbs): Take LEN in bytes,
+ not words.
+
+2026-10-24 Matt Turner <mattst88@gmail.com>
+
+ * config/ia64/unwind-ia64.c (ia64_copy_rbs): Make LEN and COUNT
+ signed.
+
2026-10-17 Sam James <sam@gentoo.org>
PR bootstrap/112422
diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index feb47d91bf13..b332dd6fe12b 100644
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,8 @@
+2026-10-24 Iain Sandoe <iain@sandoe.co.uk>
+
+ * include/bits/simd_details.h: Use __GCC_IEC_559_COMPLEX to
+ determine IEC60559 complex support.
+
2026-10-22 Zhongteng Gui <dragon-archer@outlook.com>
PR middle-end/108300
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