[gcc r16-4085] Daily bump.
GCC Administrator
gccadmin@gcc.gnu.org
Thu Sep 25 00:22:16 GMT 2025
https://gcc.gnu.org/g:e4b9750478efd79d5d41c283e5243cf2cd087f8e
commit r16-4085-ge4b9750478efd79d5d41c283e5243cf2cd087f8e
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Thu Sep 25 00:21:38 2025 +0000
Daily bump.
Diff:
---
gcc/ChangeLog | 120 ++++++++++++++++++++++++++++++++++++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/c/ChangeLog | 5 ++
gcc/cp/ChangeLog | 10 ++++
gcc/fortran/ChangeLog | 14 ++++++
gcc/testsuite/ChangeLog | 57 +++++++++++++++++++++++
libstdc++-v3/ChangeLog | 36 +++++++++++++++
7 files changed, 243 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d66580f8c660..b010b212805d 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,123 @@
+2025-09-24 Dusan Stojkovic <Dusan.Stojkovic@rt-rk.com>
+
+ PR target/121778
+ * config/riscv/riscv.md: Add define_split pattern.
+
+2025-09-24 Andrew Pinski <andrew.pinski@oss.qualcomm.com>
+
+ PR tree-optimization/121762
+ * gimple-fold.cc (gimple_fold_builtin_assume_aligned): New function.
+ (gimple_fold_builtin): Call gimple_fold_builtin_assume_aligned
+ for BUILT_IN_ASSUME_ALIGNED.
+ * tree-ssa-ccp.cc (pass_fold_builtins::execute): Remove handling
+ of BUILT_IN_ASSUME_ALIGNED.
+
+2025-09-24 Jennifer Schmitz <jschmitz@nvidia.com>
+
+ * config/aarch64/aarch64.md: Include neoversev2.md.
+ * config/aarch64/tuning_models/neoversev2.h: Enable dispatch
+ scheduling and add dispatch constraints.
+ * config/aarch64/neoversev2.md: New file and new instruction attribute
+ neoversev2_dispatch.
+
+2025-09-24 Jennifer Schmitz <jschmitz@nvidia.com>
+
+ * config.gcc: Add aarch64-sched-dispatch.o to extra_objs.
+ * config/aarch64/aarch64-protos.h (struct tune_params): New
+ field for dispatch scheduling.
+ (struct dispatch_constraint_info): New struct for dispatch scheduling.
+ * config/aarch64/aarch64-tuning-flags.def
+ (AARCH64_EXTRA_TUNING_OPTION): New flag to enable dispatch scheduling.
+ * config/aarch64/aarch64.cc (TARGET_SCHED_DISPATCH): Implement
+ target hook.
+ (TARGET_SCHED_DISPATCH_DO): Likewise.
+ (aarch64_override_options_internal): Add check for definition of
+ dispatch constraints if dispatch-scheduling tune flag is set.
+ * config/aarch64/t-aarch64: Add aarch64-sched-dispatch.o.
+ * config/aarch64/tuning_models/a64fx.h: Initialize fields for
+ dispatch scheduling in tune_params.
+ * config/aarch64/tuning_models/ampere1.h: Likewise.
+ * config/aarch64/tuning_models/ampere1a.h: Likewise.
+ * config/aarch64/tuning_models/ampere1b.h: Likewise.
+ * config/aarch64/tuning_models/cortexa35.h: Likewise.
+ * config/aarch64/tuning_models/cortexa53.h: Likewise.
+ * config/aarch64/tuning_models/cortexa57.h: Likewise.
+ * config/aarch64/tuning_models/cortexa72.h: Likewise.
+ * config/aarch64/tuning_models/cortexa73.h: Likewise.
+ * config/aarch64/tuning_models/cortexx925.h: Likewise.
+ * config/aarch64/tuning_models/emag.h: Likewise.
+ * config/aarch64/tuning_models/exynosm1.h: Likewise.
+ * config/aarch64/tuning_models/fujitsu_monaka.h: Likewise.
+ * config/aarch64/tuning_models/generic.h: Likewise.
+ * config/aarch64/tuning_models/generic_armv8_a.h: Likewise.
+ * config/aarch64/tuning_models/generic_armv9_a.h: Likewise.
+ * config/aarch64/tuning_models/neoverse512tvb.h: Likewise.
+ * config/aarch64/tuning_models/neoversen1.h: Likewise.
+ * config/aarch64/tuning_models/neoversen2.h: Likewise.
+ * config/aarch64/tuning_models/neoversen3.h: Likewise.
+ * config/aarch64/tuning_models/neoversev1.h: Likewise.
+ * config/aarch64/tuning_models/neoversev2.h: Likewise.
+ * config/aarch64/tuning_models/neoversev3.h: Likewise.
+ * config/aarch64/tuning_models/neoversev3ae.h: Likewise.
+ * config/aarch64/tuning_models/olympus.h: Likewise.
+ * config/aarch64/tuning_models/qdf24xx.h: Likewise.
+ * config/aarch64/tuning_models/saphira.h: Likewise.
+ * config/aarch64/tuning_models/thunderx.h: Likewise.
+ * config/aarch64/tuning_models/thunderx2t99.h: Likewise.
+ * config/aarch64/tuning_models/thunderx3t110.h: Likewise.
+ * config/aarch64/tuning_models/thunderxt88.h: Likewise.
+ * config/aarch64/tuning_models/tsv110.h: Likewise.
+ * config/aarch64/tuning_models/xgene1.h: Likewise.
+ * config/aarch64/aarch64-sched-dispatch.cc: New file for
+ dispatch scheduling for aarch64.
+ * config/aarch64/aarch64-sched-dispatch.h: New header file.
+
+2025-09-24 Jennifer Schmitz <jschmitz@nvidia.com>
+
+ * config/aarch64/aarch64-sve.md: Annotate instructions with
+ attribute sve_type.
+ * config/aarch64/aarch64-sve2.md: Likewise.
+ * config/aarch64/aarch64.md (sve_type): New attribute sve_type.
+ * config/aarch64/iterators.md (sve_type_unspec): New int attribute.
+ (sve_type_int): New code attribute.
+ (sve_type_fp): New int attribute.
+
+2025-09-24 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/116816
+ * tree-vect-stmts.cc (get_load_store_type): Allow multi-lane
+ single-element interleaving to fall back to VMAT_ELEMENTWISE.
+ Fall back to VMAT_ELEMENTWISE when we cannot handle a load
+ permutation.
+ (vectorizable_load): Do not check a load permutation
+ for VMAT_ELEMENTWISE. Handle grouped loads with
+ VMAT_ELEMENTWISE and directly apply a load permutation.
+
+2025-09-24 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-stmts.cc (get_load_store_type): Explicitly fail
+ when we end up with VMAT_ELEMENTWISE for BB vectorization.
+
+2025-09-24 Xi Ruoyao <xry111@xry111.site>
+
+ PR tree-optimization/122040
+ * doc/invoke.texi (-fisolate-erroneous-paths-dereference):
+ Mention it also turns division by zero into a trap in addition
+ to null dereference.
+
+2025-09-24 Xi Ruoyao <xry111@xry111.site>
+
+ PR middle-end/66462
+ * config/loongarch/loongarch.md (FCLASS_MASK): Add 3.
+ (fclass_optab): Assign isnan for 3.
+ (<FCLASS_MASK:fclass_optab><ANYF:mode>2): If FCLASS_MASK is 3,
+ only enable when -fsignaling-nans.
+
+2025-09-24 Pan Li <pan2.li@intel.com>
+
+ * match.pd: Add pattern of mult and reuse the widen-mul
+ by for keyword.
+
2025-09-23 David Malcolm <dmalcolm@redhat.com>
PR diagnostics/121986
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 77201b2cf9d9..1c24425e59bb 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20250924
+20250925
diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog
index b3dc4cb0ddb2..4e78008a2685 100644
--- a/gcc/c/ChangeLog
+++ b/gcc/c/ChangeLog
@@ -1,3 +1,8 @@
+2025-09-24 Joseph Myers <josmyers@redhat.com>
+
+ * c-typeck.cc (really_atomic_lvalue): For a COMPOUND_LITERAL_EXPR,
+ check C_DECL_REGISTER on the COMPOUND_LITERAL_EXPR_DECL.
+
2025-09-23 Alfie Richards <alfie.richards@arm.com>
* c-objc-common.cc (c_tree_printer): Add printing of target_clone and
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 6edd3fad79fe..32aa83965494 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,13 @@
+2025-09-24 Nathaniel Shead <nathanieloshead@gmail.com>
+
+ PR c++/122019
+ * module.cc (trees_in::install_entity): Don't be affected by
+ global language linkage state.
+ (trees_in::is_matching_decl): Check mismatching language linkage
+ for variables too.
+ (module_may_redeclare): Report the correct module name for
+ partitions and implementation units.
+
2025-09-23 Alfie Richards <alfie.richards@arm.com>
* class.cc (resolve_address_of_overloaded_function): Updated to use
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index 58ad0fb4489e..be89f51a1f26 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,17 @@
+2025-09-24 Mikael Morin <morin-mikael@orange.fr>
+
+ PR fortran/122046
+ * symbol.cc (gfc_get_procedure_ns): Try to find the namespace
+ among the list of contained namespaces before returning the
+ value from the formal_ns field.
+
+2025-09-24 Paul Thomas <pault@gcc.gnu.org>
+
+ PR fortran/87908
+ * interface.cc (check_interface0): If a vtable is found in the
+ interface list, check that it is either a subroutine or a
+ function. Let resolve.cc do any further checking.
+
2025-09-22 Steve Kargl <pault@gcc.gnu.org>
PR fortran/103508
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index b959c9552d9a..ef8943a5f93c 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,60 @@
+2025-09-24 Dusan Stojkovic <Dusan.Stojkovic@rt-rk.com>
+
+ PR target/121778
+ * gcc.target/riscv/pr121778-1.c: New test.
+ * gcc.target/riscv/pr121778-2.c: New test.
+
+2025-09-24 Joseph Myers <josmyers@redhat.com>
+
+ * gcc.dg/c23-complit-9.c: New test.
+
+2025-09-24 Mikael Morin <morin-mikael@orange.fr>
+
+ PR fortran/122046
+ * gfortran.dg/submodule_34.f90: New test.
+
+2025-09-24 Andrew Pinski <andrew.pinski@oss.qualcomm.com>
+
+ PR tree-optimization/121762
+ * c-c++-common/ubsan/align-5.c: Update as __builtin_assume_aligned
+ is no longer taked into account.
+ * c-c++-common/ubsan/align-5a.c: New test.
+
+2025-09-24 Xi Ruoyao <xry111@xry111.site>
+
+ PR middle-end/66462
+ * gcc.target/loongarch/fclass-compile.c: Update test.
+ * gcc.target/loongarch/fclass-run.c: Likewise.
+
+2025-09-24 Nathaniel Shead <nathanieloshead@gmail.com>
+
+ PR c++/122019
+ * g++.dg/modules/lang-4_a.C: New test.
+ * g++.dg/modules/lang-4_b.C: New test.
+
+2025-09-24 Paul Thomas <pault@gcc.gnu.org>
+
+ PR fortran/87908
+ * gfortran.dg/pr87908.f90: New test.
+
+2025-09-24 Pan Li <pan2.li@intel.com>
+
+ * gcc.target/riscv/sat/sat_u_mul-6-u16-from-u32.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-6-u16-from-u64.rv32.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-6-u16-from-u64.rv64.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-6-u32-from-u64.rv32.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-6-u32-from-u64.rv64.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-6-u8-from-u16.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-6-u8-from-u32.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-6-u8-from-u64.rv32.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-6-u8-from-u64.rv64.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-6-u16-from-u32.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-6-u16-from-u64.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-6-u32-from-u64.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-6-u8-from-u16.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-6-u8-from-u32.c: New test.
+ * gcc.target/riscv/sat/sat_u_mul-run-6-u8-from-u64.c: New test.
+
2025-09-23 David Malcolm <dmalcolm@redhat.com>
PR diagnostics/121986
diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index bedfc511f5ac..18027b718fbb 100644
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,39 @@
+2025-09-24 Luc Grosheintz <luc.grosheintz@gmail.com>
+ Tomasz Kamiński <tkaminsk@redhat.com>
+
+ * testsuite/20_util/function_objects/not_fn/nttp.cc: Move
+ test of feature testing macro to version.cc
+ * testsuite/20_util/function_objects/not_fn/version.cc: New test.
+
+2025-09-24 Tomasz Kamiński <tkaminsk@redhat.com>
+
+ * include/bits/chrono_io.h (__formatter_duration::_S_spec_for_tp):
+ Extracted from defition of formatter<sys_time>::__defSpec.
+ (formatter<chrono::sys_time<_Duration>, _CharT>::parse): Simplify
+ condition in if contexpr.
+ (formatter<chrono::sys_time<_Duration>, _CharT>::__stream_insertable):
+ Remove.
+ (formatter<chrono::sys_time<_Duration>, _CharT>::__defSpec)
+ (formatter<chrono::local_time<_Duration>, _CharT>::__defSpec):
+ Compute using __formatter_duration::_S_spec_for_tp.
+ (forrmatter<chrono::sys_time<_Duration>, _CharT>::parse): Check if
+ parse _M_chrono_spec
+ * testsuite/std/time/format/empty_spec.cc: Extend tests for floating
+ point and other non-streamable durations (years).
+
+2025-09-24 Tomasz Kamiński <tkaminsk@redhat.com>
+
+ * include/bits/chrono_io.h (__formatter_chrono::_M_parse):
+ Replace _ParseContext with basic_format_parse_context<_CharT> and
+ make it non-template.
+ (__formatter_duration::_M_parse): Replace _ParseContext with
+ basic_format_parse_context<_CharT> and remove unused default
+ argument.
+
+2025-09-24 Patrick Palka <ppalka@redhat.com>
+
+ * testsuite/17_intro/names.cc: Undefine 'u' on s390*-linux.
+
2025-09-23 Jonathan Wakely <jwakely@redhat.com>
* include/bits/random.h: Include <bits/ios_base.h> instead of
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