[gcc r16-458] Daily bump.
GCC Administrator
gccadmin@gcc.gnu.org
Thu May 8 00:17:15 GMT 2025
https://gcc.gnu.org/g:5b2b7bc15d33eb2a799f68faafeb2613f2eea8c7
commit r16-458-g5b2b7bc15d33eb2a799f68faafeb2613f2eea8c7
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Thu May 8 00:16:47 2025 +0000
Daily bump.
Diff:
---
gcc/ChangeLog | 111 ++++++++++++++++++++++++++++++++++++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/fortran/ChangeLog | 8 ++++
gcc/testsuite/ChangeLog | 71 +++++++++++++++++++++++++++++++
libcpp/ChangeLog | 13 ++++++
libgfortran/ChangeLog | 22 ++++++++++
libgomp/ChangeLog | 6 +++
libstdc++-v3/ChangeLog | 51 ++++++++++++++++++++++
8 files changed, 283 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d239c358f980..cbce913c049a 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,114 @@
+2025-05-07 Jeff Law <jlaw@ventanamicro.com>
+
+ PR target/120137
+ PR target/120154
+ * config/riscv/riscv-vect-permconst.cc (process_bb): Verify each
+ canonicalized element fits into the vector element mode.
+
+2025-05-07 Dongyan Chen <chendongyan@isrc.iscas.ac.cn>
+
+ * common/config/riscv/riscv-common.cc: New extension.
+ * config/riscv/riscv.opt: Ditto.
+
+2025-05-07 Richard Earnshaw <rearnsha@arm.com>
+
+ PR target/91323
+ * config/arm/arm.cc (arm_select_cc_mode): Use CCFPEmode for LTGT.
+
+2025-05-07 Richard Earnshaw <rearnsha@arm.com>
+
+ PR target/110796
+ PR target/118446
+ * config/arm/arm.h (REVERSIBLE_CC_MODE): FP modes are only
+ reversible if flag_finite_math_only.
+ * config/arm/arm.cc (arm_select_cc_mode): Return CCFPmode for all
+ FP comparisons if flag_finite_math_only.
+
+2025-05-07 Andrew Pinski <quic_apinski@quicinc.com>
+
+ PR tree-optimization/111276
+ * gimple-fold.cc (arith_code_with_undefined_signed_overflow): Make static.
+ (gimple_with_undefined_signed_overflow): New function.
+ * gimple-fold.h (arith_code_with_undefined_signed_overflow): Remove.
+ (gimple_with_undefined_signed_overflow): Add declaration.
+ * tree-if-conv.cc (if_convertible_gimple_assign_stmt_p): Use
+ gimple_with_undefined_signed_overflow instead of manually
+ checking lhs and the code of the stmt.
+ (predicate_statements): Likewise.
+ * tree-ssa-ifcombine.cc (ifcombine_rewrite_to_defined_overflow): Likewise.
+ * tree-ssa-loop-im.cc (move_computations_worker): Likewise.
+ * tree-ssa-reassoc.cc (update_range_test): Likewise. Reformat.
+ * tree-scalar-evolution.cc (final_value_replacement_loop): Use
+ gimple_with_undefined_signed_overflow instead of
+ arith_code_with_undefined_signed_overflow.
+ * tree-ssa-loop-split.cc (split_loop): Likewise.
+
+2025-05-07 Andrew Pinski <quic_apinski@quicinc.com>
+
+ * tree-ssa-loop-im.cc (compute_invariantness): Hoist to the always executed point
+ if ignorning the cost.
+
+2025-05-07 Jan Hubicka <hubicka@ucw.cz>
+
+ * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost): Add FLOAT_EXPR;
+ FIX_TRUNC_EXPR and vec_promote_demote costs.
+
+2025-05-07 Jennifer Schmitz <jschmitz@nvidia.com>
+
+ PR target/117978
+ * config/aarch64/aarch64-protos.h: Declare
+ aarch64_emit_load_store_through_mode and aarch64_sve_maskloadstore.
+ * config/aarch64/aarch64-sve.md
+ (maskload<mode><vpred>): New define_expand folding maskloads with
+ certain predicate patterns to ASIMD loads.
+ (*aarch64_maskload<mode><vpred>): Renamed from maskload<mode><vpred>.
+ (maskstore<mode><vpred>): New define_expand folding maskstores with
+ certain predicate patterns to ASIMD stores.
+ (*aarch64_maskstore<mode><vpred>): Renamed from maskstore<mode><vpred>.
+ * config/aarch64/aarch64.cc
+ (aarch64_emit_load_store_through_mode): New function emitting a
+ load/store through subregs of a given mode.
+ (aarch64_emit_sve_pred_move): Refactor to use
+ aarch64_emit_load_store_through_mode.
+ (aarch64_expand_maskloadstore): New function to emit ASIMD loads/stores
+ for maskloads/stores with SVE predicates with VL1, VL2, VL4, VL8, or
+ VL16 patterns.
+ (aarch64_partial_ptrue_length): New function returning number of leading
+ set bits in a predicate.
+
+2025-05-07 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
+
+ * config/s390/s390-protos.h (s390_expand_cstoreti4): New
+ function.
+ * config/s390/s390.cc (s390_expand_cstoreti4): New function.
+ * config/s390/s390.md (CC_SUZ): New mode iterator.
+ (l): New mode attribute.
+ (cc_tolower): New mode attribute.
+ * config/s390/vector.md (cstoreti4): New expander.
+ (*vec_cmpv2di_lane0_<cc_tolower>): New insn.
+ (*vec_cmpti_<cc_tolower>): New insn.
+
+2025-05-07 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/120036
+ * config/i386/i386-features.cc (ix86_get_vector_load_mode):
+ Handle 8/4/2 bytes.
+ (remove_redundant_vector_load): If the mode size is smaller than
+ its natural size, first insert an extra move with a QI vector
+ SUBREG of the same size to avoid validate_subreg failure.
+
+2025-05-07 hongtao.liu <hongtao.liu@intel.com>
+
+ PR gcov-profile/118508
+ * auto-profile.cc
+ (autofdo_source_profile::get_callsite_total_count): Fix name
+ mismatch for fortran.
+
+2025-05-07 Jeff Law <jlaw@ventanamicro.com>
+
+ * config/riscv/riscv.md (*branch<ANYI:mode>_shiftedarith_equals_zero):
+ Avoid generating unnecessary andi. Fix formatting.
+
2025-05-06 Dongyan Chen <chendongyan@isrc.iscas.ac.cn>
* common/config/riscv/riscv-common.cc: New extension.
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 9687431edbfc..8cb3c2b2cb23 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20250507
+20250508
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index e6d9fa664d86..d92b9d671fe1 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,11 @@
+2025-05-07 Paul Thomas <pault@gcc.gnu.org>
+ and Steven G. Kargl <kargl@gcc.gnu.org>
+
+ PR fortran/119948
+ * primary.cc (match_variable): Module procedures with sym the
+ same as result can be treated as variables, although marked
+ external.
+
2025-05-06 Jerry DeLisle <jvdelisle@gcc.gnu.org>
PR fortran/120049
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index b2ebcef130ff..73e8f7c1ac2d 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,74 @@
+2025-05-07 Jeff Law <jlaw@ventanamicro.com>
+
+ PR target/120137
+ PR target/120154
+ * gcc.target/riscv/pr120137.c: New test.
+ * gcc.target/riscv/pr120154.c: New test.
+
+2025-05-07 Dongyan Chen <chendongyan@isrc.iscas.ac.cn>
+
+ * gcc.target/riscv/arch-48.c: New test.
+
+2025-05-07 Richard Earnshaw <rearnsha@arm.com>
+
+ PR target/110796
+ PR target/118446
+ * gcc.target/arm/armv8_2-fp16-arith-1.c: Adjust due to no-longer
+ emitting VCMPE when -ffast-math..
+
+2025-05-07 Jakub Jelinek <jakub@redhat.com>
+
+ PR preprocessor/108900
+ PR preprocessor/116047
+ PR preprocessor/120061
+ * gcc.dg/plugin/plugin.exp: Add location-overflow-test-pr116047.c
+ and location-overflow-test-pr120061.c.
+ * gcc.dg/plugin/location_overflow_plugin.cc (plugin_init): Don't error
+ on unknown values, instead just break. Handle 0x4fHHHHHH arguments
+ differently.
+ * gcc.dg/plugin/location-overflow-test-pr116047.c: New test.
+ * gcc.dg/plugin/location-overflow-test-pr116047-1.h: New test.
+ * gcc.dg/plugin/location-overflow-test-pr116047-2.h: New test.
+ * gcc.dg/plugin/location-overflow-test-pr120061.c: New test.
+ * gcc.dg/plugin/location-overflow-test-pr120061-1.h: New test.
+ * gcc.dg/plugin/location-overflow-test-pr120061-2.h: New test.
+
+2025-05-07 Jan Hubicka <hubicka@ucw.cz>
+
+ * gcc.target/i386/pr119919.c: Add -mtune=znver1
+
+2025-05-07 Jennifer Schmitz <jschmitz@nvidia.com>
+
+ PR target/117978
+ * gcc.target/aarch64/sve/acle/general/whilelt_5.c: Adjust expected
+ outcome.
+ * gcc.target/aarch64/sve/ldst_ptrue_pat_128_to_neon.c: New test.
+ * gcc.target/aarch64/sve/while_7.c: Adjust expected outcome.
+ * gcc.target/aarch64/sve/while_9.c: Adjust expected outcome.
+
+2025-05-07 Stefan Schulze Frielinghaus <stefansf@gcc.gnu.org>
+
+ * gcc.target/s390/vector/cstoreti-1.c: New test.
+ * gcc.target/s390/vector/cstoreti-2.c: New test.
+
+2025-05-07 H.J. Lu <hjl.tools@gmail.com>
+
+ PR target/120036
+ * g++.target/i386/pr120036.C: New test.
+ * gcc.target/i386/pr117839-3a.c: Likewise.
+ * gcc.target/i386/pr117839-3b.c: Likewise.
+
+2025-05-07 Paul Thomas <pault@gcc.gnu.org>
+ and Steven G. Kargl <kargl@gcc.gnu.org>
+
+ PR fortran/119948
+ * gfortran.dg/pr119948.f90: Update to incorporate failing test,
+ where module procedure is the result. Test submodule cases.
+
+2025-05-07 Jeff Law <jlaw@ventanamicro.com>
+
+ * g++.target/riscv/redundant-andi.C: New test.
+
2025-05-06 Dongyan Chen <chendongyan@isrc.iscas.ac.cn>
* gcc.target/riscv/arch-47.c: New test.
diff --git a/libcpp/ChangeLog b/libcpp/ChangeLog
index 9a5208c27717..eef6ec7a48ca 100644
--- a/libcpp/ChangeLog
+++ b/libcpp/ChangeLog
@@ -1,3 +1,16 @@
+2025-05-07 Jakub Jelinek <jakub@redhat.com>
+
+ PR preprocessor/108900
+ PR preprocessor/116047
+ PR preprocessor/120061
+ * files.cc (_cpp_stack_file): Revert 2025-03-28 change.
+ * line-map.cc (linemap_add): Use
+ SOURCE_LINE (from, linemap_included_from (map - 1)) + 1; instead of
+ SOURCE_LINE (from, from[1].start_location); to compute to_line
+ for LC_LEAVE. For LC_ENTER included_from computation, look at
+ map[-2] or even lower if map[-1] has the same start_location as
+ map[0].
+
2025-04-28 Lewis Hyatt <lhyatt@gmail.com>
PR c/118838
diff --git a/libgfortran/ChangeLog b/libgfortran/ChangeLog
index aa92b02686f0..dd177ab332e8 100644
--- a/libgfortran/ChangeLog
+++ b/libgfortran/ChangeLog
@@ -1,3 +1,25 @@
+2025-05-07 Jakub Jelinek <jakub@redhat.com>
+
+ PR libfortran/120153
+ * Makefile.am (i_maxloc1_c): Add generated/maxloc1_16_m16.c.
+ * intrinsics/random.c (arandom_m16): Use #ifdef HAVE_GFC_UINTEGER_16
+ guard rather than #ifdef GFC_HAVE_GFC_UINTEGER_16.
+ * gfortran.map (GFORTRAN_15): Remove _gfortran_arandom_m16,
+ _gfortran_maxloc1_16_m16, _gfortran_mmaxloc1_16_m16 and
+ _gfortran_smaxloc1_16_m16.
+ (GFORTRAN_15.2): New symbol version, add those 4 symbols to it.
+ * generated/maxloc1_16_m16.c: New file.
+ * Makefile.in: Regenerate.
+
+2025-05-07 Jakub Jelinek <jakub@redhat.com>
+
+ PR libfortran/120152
+ * Makefile.am (i_maxloc1_c): Readd generated/maxloc1_4_i8.c,
+ generated/maxloc1_8_i8.c, generated/maxloc1_16_i8.c,
+ generated/maxloc1_4_i16.c, generated/maxloc1_8_i16.c. Move
+ generated/maxloc1_16_i16.c entry earlier in the list.
+ * Makefile.in: Regenerated.
+
2025-04-22 Andre Vehreschild <vehre@gcc.gnu.org>
* caf/libcaf.h: Add mapping mode to coarray's register.
diff --git a/libgomp/ChangeLog b/libgomp/ChangeLog
index b4032bca3d0d..a0d7c72be0d5 100644
--- a/libgomp/ChangeLog
+++ b/libgomp/ChangeLog
@@ -1,3 +1,9 @@
+2025-05-07 Tobias Burnus <tburnus@baylibre.com>
+
+ * testsuite/libgomp.fortran/map-alloc-comp-9.f90: Process differently
+ when USE_USM_REQUIREMENT is set.
+ * testsuite/libgomp.fortran/map-alloc-comp-9-usm.f90: New test.
+
2025-05-06 Tejas Belagod <tejas.belagod@arm.com>
* testsuite/libgomp.c-target/aarch64/udr-sve.c: Fix test.
diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index 8aa7ec82ba0c..b7cce6d01945 100644
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,54 @@
+2025-05-07 Jonathan Wakely <jwakely@redhat.com>
+
+ PR libstdc++/120159
+ * src/c++23/std.cc.in (is_layout_compatible_v): Export.
+
+2025-05-07 Jonathan Wakely <jwakely@redhat.com>
+
+ * src/c++23/std.cc.in: Fix export for std::extents.
+
+2025-05-07 Luc Grosheintz <luc.grosheintz@gmail.com>
+
+ * testsuite/23_containers/mdspan/extents/class_mandates_neg.cc: New test.
+ * testsuite/23_containers/mdspan/extents/ctor_copy.cc: New test.
+ * testsuite/23_containers/mdspan/extents/ctor_ints.cc: New test.
+ * testsuite/23_containers/mdspan/extents/ctor_shape.cc: New test.
+ * testsuite/23_containers/mdspan/extents/custom_integer.cc: New test.
+ * testsuite/23_containers/mdspan/extents/misc.cc: New test.
+
+2025-05-07 Luc Grosheintz <luc.grosheintz@gmail.com>
+
+ PR libstdc++/107761
+ * include/std/mdspan (extents): New class.
+ * src/c++23/std.cc.in: Add 'using std::extents'.
+
+2025-05-07 Luc Grosheintz <luc.grosheintz@gmail.com>
+
+ * doc/doxygen/user.cfg.in: Add <mdspan>.
+ * include/Makefile.am: Ditto.
+ * include/Makefile.in: Ditto.
+ * include/precompiled/stdc++.h: Ditto.
+ * include/std/mdspan: New file.
+
+2025-05-07 Luc Grosheintz <luc.grosheintz@gmail.com>
+
+ * include/bits/version.def: Add internal feature testing macro
+ __glibcxx_mdspan.
+ * include/bits/version.h: Regenerate.
+
+2025-05-07 Tomasz Kamiński <tkaminsk@redhat.com>
+
+ PR libstdc++/120114
+ * include/bits/chrono_io.h (__formatter_chrono::_M_format): Use __field_width.
+ * testsuite/std/time/format/pr120114.cc: New test.
+
+2025-05-07 Jonathan Wakely <jwakely@redhat.com>
+
+ PR libstdc++/120147
+ * acinclude.m4 (GLIBCXX_ENABLE_BACKTRACE): Restore use of
+ AC_LANG_CPLUSPLUS.
+ * configure: Regenerate.
+
2025-05-06 Jonathan Wakely <jwakely@redhat.com>
PR libstdc++/70560
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