[gcc r15-5114] Daily bump.
GCC Administrator
gccadmin@gcc.gnu.org
Tue Nov 12 00:20:00 GMT 2024
https://gcc.gnu.org/g:03cb3f605e2d593c40283ba60b8af49306f880b8
commit r15-5114-g03cb3f605e2d593c40283ba60b8af49306f880b8
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Tue Nov 12 00:19:15 2024 +0000
Daily bump.
Diff:
---
gcc/ChangeLog | 378 +++++++++++++++++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/c-family/ChangeLog | 12 +
gcc/c/ChangeLog | 5 +
gcc/cp/ChangeLog | 34 +++
gcc/fortran/ChangeLog | 23 ++
gcc/m2/ChangeLog | 289 ++++++++++++++++++++++
gcc/testsuite/ChangeLog | 627 ++++++++++++++++++++++++++++++++++++++++++++++++
libgomp/ChangeLog | 10 +
libstdc++-v3/ChangeLog | 20 ++
10 files changed, 1399 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 705bb7692e21..302f5960468d 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,381 @@
+2024-11-11 Jason Merrill <jason@redhat.com>
+
+ * doc/invoke.texi: Rename -fmodules-ts to -fmodules.
+
+2024-11-11 Jason Merrill <jason@redhat.com>
+
+ * opts.h (cl_deferred_option::value): Change to HOST_WIDE_INT.
+ (set_option): Change opt_index parm to size_t.
+ * opts-common.cc (set_option): Likewise.
+
+2024-11-11 Jakub Jelinek <jakub@redhat.com>
+
+ * doc/extend.texi (New/Delete Builtins): Document
+ __builtin_operator_new and __builtin_operator_delete.
+
+2024-11-11 Claudio Bantaloukas <claudio.bantaloukas@arm.com>
+
+ * config/aarch64/aarch64.cc
+ (aarch64_vfp_is_call_or_return_candidate): use fp registers to
+ return svmfloat8_t parameters.
+
+2024-11-11 Richard Biener <rguenther@suse.de>
+
+ * tree-vect-slp.cc (arg1_arg3_map): New.
+ (arg1_arg3_arg4_map): Likewise.
+ (vect_get_operand_map): Handle IFN_SCATTER_STORE,
+ IFN_MASK_SCATTER_STORE and IFN_MASK_LEN_SCATTER_STORE.
+ (vect_build_slp_tree_1): Likewise.
+ * tree-vect-stmts.cc (vectorizable_store): For SLP masked
+ gather/scatter record the mask with proper number of copies.
+ * tree-vect-loop.cc (vectorizable_recurr): Avoid costing
+ the initial value construction in the prologue twice with SLP.
+
+2024-11-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Handle
+ __ARM_FEATURE_SVE2p1.
+
+2024-11-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-modes.def (VNx1SI, VNx1DI): New modes.
+ * config/aarch64/aarch64-sve-builtins-base.cc
+ (svdup_lane_impl::expand): Update generation of TBL instruction.
+ (svtbl_impl): Delete.
+ (svtbl): Use unspec_based_uncond_function instead.
+ * config/aarch64/aarch64-sve-builtins-functions.h
+ (permute::fold_permute): Handle trailing immediate arguments.
+ * config/aarch64/aarch64-sve-builtins-shapes.h (extq): Declare.
+ (load_gather64_sv_index, load_gather64_sv_offset): Likewise.
+ (load_gather64_vs_index, load_gather64_vs_offset): Likewise.
+ (pmov_from_vector, pmov_from_vector_lane, pmov_to_vector_lane)
+ (reduction_neonq, store_scatter64_index, store_scatter64_offset)
+ (unary_lane): Likewise.
+ * config/aarch64/aarch64-sve-builtins-shapes.cc
+ (load_gather64_sv_base, store_scatter64_base): New classes.
+ (extq_def, ext): New shape.
+ (load_gather64_sv_index_def, load_gather64_sv_index): Likewise.
+ (load_gather64_sv_offset_def, load_gather64_sv_offset): Likewise.
+ (load_gather64_vs_index_def, load_gather64_vs_index): Likewise.
+ (load_gather64_vs_offset_def, load_gather64_vs_offset): Likewise.
+ (pmov_from_vector_def, pmov_from_vector): Likewise.
+ (pmov_from_vector_lane_def, pmov_from_vector_lane): Likewise.
+ (pmov_to_vector_lane_def, pmov_to_vector_lane): Likewise.
+ (reduction_neonq_def, reduction_neonq): Likewise.
+ (store_scatter64_index_def, store_scatter64_index): Likewise.
+ (store_scatter64_offset_def, store_scatter64_offset): Likewise.
+ (unary_lane_def, unary_lane): Likewise.
+ * config/aarch64/aarch64-sve-builtins-sve2.h (svaddqv, svandqv)
+ (svdup_laneq, sveorqv, svextq, svld1q_gather, svld1udq, svld1uwq)
+ (svld2q, svld3q, svld4q, svmaxnmqv, svmaxqv, svminnmqv, svminqv)
+ (svorqv, svpmov, svpmov_lane, svst1qd, svst1q_scatter, svst1wq)
+ (svst2q, svst3q, svst4q, svtblq, svtbx, svtbxq, svuzpq1, svuzpq2)
+ (svzipq1, svzipq2): Declare.
+ * config/aarch64/aarch64-sve-builtins-sve2.cc (ld1uxq_st1xq_base)
+ (ld234q_st234q_base, svdup_laneq_impl, svextq_impl): New classes.
+ (svld1q_gather_impl, svld1uxq_impl, svld234q_impl): Likewise.
+ (svpmov_impl, svpmov_lane_impl, svst1q_scatter_impl): Likewise.
+ (svst1xq_impl, svst234q_impl, svuzpq_impl, svzipq_impl): Likewise.
+ (svaddqv, svandqv, svdup_laneq, sveorqv, svextq, svld1q_gather)
+ (svld1udq, svld1uwq, svld2q, svld3q, svld4q, svmaxnmqv, svmaxqv)
+ (svminnmqv, svminqv, svorqv, svpmov, svpmov_lane, svst1qd)
+ (svst1q_scatter, svst1wq, svst2q, svst3q, svst4q, svtblq, svtbx)
+ (svtbxq, svuzpq1, svuzpq2, svzipq1, svzipq2): New function entries.
+ * config/aarch64/aarch64-sve-builtins-sve2.def (svaddqv, svandqv)
+ (svdup_laneq, sveorqv, svextq, svld2q, svld3q, svld4q, svmaxnmqv)
+ (svmaxqv, svminnmqv, svminqv, svorqv, svpmov, svpmov_lanes, vst2q)
+ (svst3q, svst4q, svtblq, svtbxq, svuzpq1, svuzpq2, svzipq1, svzipq2)
+ (svld1q_gather, svld1udq, svld1uwq, svst1dq, svst1q_scatter)
+ (svst1wq): New function definitions.
+ * config/aarch64/aarch64-sve-builtins.cc (TYPES_hsd_data)
+ (hsd_data, s_data): New type lists.
+ (function_resolver::infer_pointer_type): Give a specific error about
+ passing a pointer to 8-bit elements to an _index function.
+ (function_resolver::resolve_sv_displacement): Check whether the
+ function allows 32-bit bases.
+ * config/aarch64/iterators.md (UNSPEC_TBLQ, UNSPEC_TBXQ): New unspecs.
+ (UNSPEC_ADDQV, UNSPEC_ANDQV, UNSPEC_DUPQ, UNSPEC_EORQV, UNSPEC_EXTQ)
+ (UNSPEC_FADDQV, UNSPEC_FMAXQV, UNSPEC_FMAXNMQV, UNSPEC_FMINQV)
+ (UNSPEC_FMINNMQV, UNSPEC_LD1_EXTENDQ, UNSPEC_LD1Q_GATHER): Likewise.
+ (UNSPEC_LDNQ, UNSPEC_ORQV, UNSPEC_PMOV_PACK, UNSPEC_PMOV_PACK_LANE)
+ (UNSPEC_PMOV_UNPACK, UNSPEC_PMOV_UNPACK_LANE, UNSPEC_SMAXQV): Likewise.
+ (UNSPEC_SMINQV, UNSPEC_ST1_TRUNCQ, UNSPEC_ST1Q_SCATTER, UNSPEC_STNQ)
+ (UNSPEC_UMAXQV, UNSPEC_UMINQV, UNSPEC_UZPQ1, UNSPEC_UZPQ2): Likewise.
+ (UNSPEC_ZIPQ1, UNSPEC_ZIPQ2): Likewise.
+ (Vtype): Handle single-vector SVE modes.
+ (Vendreg): Handle SVE structure modes.
+ (VNxTI, LD1_EXTENDQ_MEM): New mode attributes.
+ (SVE_PERMUTE, SVE_TBL, SVE_TBX): New int iterators.
+ (SVE_INT_REDUCTION_128, SVE_FP_REDUCTION_128): Likewise.
+ (optab): Handle the new SVE2.1 reductions.
+ (perm_insn): Handle the new SVE2.1 permutations.
+ * config/aarch64/aarch64-sve.md
+ (@aarch64_sve_tbl<mode>): Generalize to...
+ (@aarch64_sve_<SVE_TBL:perm_insn><mode>): ...this.
+ (@aarch64_sve_<PERMUTE:perm_insn><mode>): Generalize to...
+ (@aarch64_sve_<SVE_PERMUTE:perm_insn><mode>): ...this.
+ * config/aarch64/aarch64-sve2.md (@aarch64_pmov_to_<mode>)
+ (@aarch64_pmov_lane_to_<mode>, @aarch64_pmov_from_<mode>)
+ (@aarch64_pmov_lane_from_<mode>, @aarch64_sve_ld1_extendq<mode>)
+ (@aarch64_sve_ldnq<mode>, aarch64_gather_ld1q): New patterns.
+ (@aarch64_sve_st1_truncq<mode>, @aarch64_sve_stnq<mode>): Likewise.
+ (aarch64_scatter_st1q, @aarch64_pred_reduc_<optab>_<mode>): Likewise.
+ (@aarch64_sve_dupq<mode>, @aarch64_sve_extq<mode>): Likewise.
+ (@aarch64_sve2_tbx<mode>): Generalize to...
+ (@aarch64_sve_<SVE_TBX:perm_insn><mode>): ...this.
+ * config/aarch64/aarch64.cc
+ (aarch64_classify_vector_memory_mode): New function.
+ (aarch64_regmode_natural_size): Use it.
+ (aarch64_classify_index): Likewise.
+ (aarch64_classify_address): Likewise.
+ (aarch64_print_address_internal): Likewise.
+ (aarch64_evpc_hvla): New function.
+ (aarch64_expand_vec_perm_const_1): Use it.
+
+2024-11-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64.h (TARGET_SVE2p1_OR_SME2): New macro.
+ * config/aarch64/aarch64-early-ra.cc
+ (is_stride_candidate): Require TARGET_STREAMING_SME2
+ (early_ra::maybe_convert_to_strided_access): Likewise.
+ * config/aarch64/aarch64-sve-builtins-sve2.def: Mark instructions
+ that are common to both SVE2p1 and SME2.
+ * config/aarch64/aarch64-sve.md
+ (@aarch64_<sur>dot_prod_lane<SVE_FULL_SDI:mode><SVE_FULL_BHI:mode>):
+ Test TARGET_SVE2p1_OR_SME2 instead of TARGET_STREAMING_SME2.
+ (@aarch64_sve_<sve_fp_op>vnx4sf): Move TARGET_SVE_BF16 condition
+ into SVE_BFLOAT_TERNARY_LONG.
+ (@aarch64_sve_<sve_fp_op>_lanevnx4sf): Likewise
+ SVE_BFLOAT_TERNARY_LONG_LANE.
+ * config/aarch64/aarch64-sve2.md
+ (@aarch64_<LD1_COUNT:optab><mode>): Require TARGET_SVE2p1_OR_SME2
+ instead of TARGET_STREAMING_SME2.
+ (@aarch64_<ST1_COUNT:optab><mode>): Likewise.
+ (@aarch64_sve_ptrue_c<BHSD_BITS>): Likewise.
+ (@aarch64_sve_pext<BHSD_BITS>): Likewise.
+ (@aarch64_sve_pext<BHSD_BITS>x2): Likewise.
+ (@aarch64_sve_cntp_c<BHSD_BITS>): Likewise.
+ (@aarch64_sve_fclamp<mode>): Likewise.
+ (*aarch64_sve_fclamp<mode>_x): Likewise.
+ (<sur>dot_prodvnx4sivnx8hi): Likewise.
+ (aarch64_sve_fdotvnx4sfvnx8hf): Likewise.
+ (aarch64_fdot_prod_lanevnx4sfvnx8hf): Likewise.
+ (@aarch64_sve_while<while_optab_cmp>_b<BHSD_BITS>_x2): Likewise.
+ (@aarch64_sve_while<while_optab_cmp>_c<BHSD_BITS>): Likewise.
+ (@aarch64_sve_<optab><VNx8HI_ONLY:mode><VNx8SI_ONLY:mode>): Move
+ TARGET_STREAMING_SME2 condition into SVE_QCVTxN.
+ (@aarch64_sve_<sve_int_op><mode>): Likewise
+ SVE2_INT_SHIFT_IMM_NARROWxN, but also require TARGET_STREAMING_SME2
+ for the 4-register forms.
+ * config/aarch64/iterators.md (SVE_BFLOAT_TERNARY_LONG): Require
+ TARGET_SVE2p1_OR_SME2 rather than TARGET_STREAMING_SME2 for
+ UNSPEC_BFMLSLB and UNSPEC_BFMLSLT. Require TARGET_SVE_BF16
+ for the others.
+ (SVE_BFLOAT_TERNARY_LONG_LANE): Likewise.
+ (SVE2_INT_SHIFT_IMM_NARROWxN): Require TARGET_SVE2p1_OR_SME2 for
+ the interleaving forms and TARGET_STREAMING_SME2 for the rest.
+ (SVE_QCVTxN): Likewise.
+
+2024-11-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-option-extensions.def (sve2p1): New extension.
+ * doc/invoke.texi (sve2p1): Document it.
+ * config/aarch64/aarch64-sve-builtins-sve2.def: Mark instructions
+ that are common to both SVE2p1 and SME.
+ * config/aarch64/aarch64.h (TARGET_SVE2p1): New macro.
+ (TARGET_SVE2p1_OR_SME): Likewise.
+ * config/aarch64/aarch64-sve2.md
+ (@aarch64_sve_psel<BHSD_BITS>): Require TARGET_SVE2p1_OR_SME
+ instead of TARGET_STREAMING.
+ (*aarch64_sve_psel<BHSD_BITS>_plus): Likewise.
+ (@aarch64_sve_<su>clamp<mode>): Likewise.
+ (*aarch64_sve_<su>clamp<mode>_x): Likewise.
+ (@aarch64_pred_<optab><mode>): Likewise.
+ (@cond_<optab><mode>): Likewise.
+
+2024-11-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config.gcc (extra_headers): Add arm_private_neon_types.h.
+ * config/aarch64/arm_private_neon_types.h: New file, split out
+ from...
+ * config/aarch64/arm_neon.h: ...here.
+ * config/aarch64/arm_sve.h: Include arm_private_neon_types.h
+
+2024-11-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-modes.def (VNx64BI): New mode.
+ * config/aarch64/aarch64-protos.h
+ (aarch64_split_double_move): Generalize to...
+ (aarch64_split_move): ...this.
+ * config/aarch64/aarch64-sve-builtins-base.def (svcreate4, svget4)
+ (svset4, svundef4): Add bool variants.
+ * config/aarch64/aarch64-sve-builtins.cc (handle_arm_sve_h): Add
+ svboolx4_t.
+ * config/aarch64/iterators.md (SVE_STRUCT_BI): New mode iterator.
+ * config/aarch64/aarch64-sve.md (movvnx32bi): Generalize to...
+ (mov<SVE_STRUCT_BI:mode>): ...this.
+ * config/aarch64/aarch64.cc
+ (pure_scalable_type_info::piece::get_rtx): Allow num_prs to be 4.
+ (aarch64_classify_vector_mode): Handle VNx64BI.
+ (aarch64_hard_regno_nregs): Likewise.
+ (aarch64_class_max_nregs): Likewise.
+ (aarch64_array_mode): Use VNx64BI for arrays of 4 svbool_ts.
+ (aarch64_split_double_move): Generalize to...
+ (aarch64_split_move): ...this.
+ (aarch64_split_128bit_move): Update call accordingly.
+
+2024-11-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-sve-builtins-sve2.def: Sort entries
+ alphabetically.
+ * config/aarch64/aarch64-sve-builtins-sve2.h: Likewise.
+ * config/aarch64/aarch64-sve-builtins-sve2.cc: Likewise.
+
+2024-11-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-sve-builtins-shapes.cc (ext_base): New base
+ class, extracted from...
+ (ext_def): ...here.
+
+2024-11-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-sve-builtins.h
+ (function_resolver::target_type_restrictions): New enum.
+ (function_resolver::infer_pointer_type): Add an extra argument
+ that specifies what the target type can be.
+ * config/aarch64/aarch64-sve-builtins.cc
+ (function_resolver::infer_pointer_type): Likewise.
+ * config/aarch64/aarch64-sve-builtins-shapes.cc
+ (load_gather_sv_base::get_target_type_restrictions): New virtual
+ member function.
+ (load_gather_sv_base::resolve): Use it. Update call to
+ infer_pointer_type.
+
+2024-11-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-sve-builtins-shapes.cc
+ (store_scatter_base::infer_vector_type): New virtual member function.
+ (store_scatter_base::resolve): Use it.
+
+2024-11-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-sve-builtins.h
+ (function_shape::vector_base_type): New member function.
+ * config/aarch64/aarch64-sve-builtins.cc
+ (function_shape::vector_base_type): Likewise.
+ (function_resolver::resolve_sv_displacement): Use it.
+ (function_resolver::resolve_gather_address): Likewise.
+
+2024-11-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-sve.md (@aarch64_sve_tbl<mode>): Wrap
+ the second operand in braces.
+
+2024-11-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-sve-builtins.cc (TYPES_all_data): Redefine
+ in terms of single-size *_data definitions.
+ (TYPES_bhs_data, TYPES_hs_data, TYPES_sd_data): Likewise.
+ (TYPES_b_data, TYPES_h_data, TYPES_s_data): New macros.
+
+2024-11-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64.h (TARGET_SME): Expand comment.
+ (TARGET_STREAMING_SME): Delete.
+ * config/aarch64/aarch64-sme.md: Use TARGET_STREAMING instead of
+ TARGET_STREAMING_SME.
+ * config/aarch64/aarch64-sve2.md: Likewise.
+
+2024-11-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ * config/aarch64/aarch64-sme.md: Use TARGET_STREAMING_SME2
+ instead of separate TARGET_STREAMING and TARGET_SME2 tests.
+ * config/aarch64/aarch64-sve2.md: Likewise.
+ * config/aarch64/iterators.md: Likewise.
+
+2024-11-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ * function.h (push_function_decl, pop_function_decl): Declare.
+ * function.cc (set_function_decl): New function, extracted from...
+ (set_cfun): ...here.
+ (push_function_decl): New function, extracted from...
+ (push_cfun): ...here.
+ (pop_cfun_1): New function, extracted from...
+ (pop_cfun): ...here.
+ (pop_function_decl): New function.
+
+2024-11-11 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/117510
+ * tree-ssa-loop-unswitch.cc (find_loop_guard): Only check
+ not skipped blocks for side-effects.
+
+2024-11-11 Pan Li <pan2.li@intel.com>
+
+ * config/riscv/autovec.md: Fix indent format issue.
+
+2024-11-11 Sam James <sam@gentoo.org>
+
+ PR other/116948
+ * doc/install.texi (Building a native compiler): Document UBSAN_OPTIONS.
+
+2024-11-11 Sam James <sam@gentoo.org>
+
+ PR other/116948
+ * doc/install.texi (Building a native compiler): Mention bootstrap-ubsan.
+
+2024-11-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
+
+ * config/xtensa/xtensa.md (*extzvsi-1bit_addsubx):
+ Add '&' to the destination register constraint to indicate that
+ it is 'earlyclobber', append '0' to the first source register
+ constraint to indicate that it can be the same as the destination
+ register, and change the split condition from 1 to reload_completed
+ so that the insn will be split only after RA in order to obtain
+ allocated registers that satisfy the above constraints.
+
+2024-11-11 Haochen Jiang <haochen.jiang@intel.com>
+
+ * common/config/i386/cpuinfo.h
+ (get_intel_cpu): Handle Diamond Rapids.
+ * common/config/i386/i386-common.cc (processor_name):
+ Add Diamond Rapids.
+ (processor_alias_table): Ditto.
+ * common/config/i386/i386-cpuinfo.h (enum processor_types):
+ Add INTEL_COREI7_DIAMONDRAPIDS.
+ * config.gcc: Add -march=diamondrapids.
+ * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
+ diamondrapids.
+ * config/i386/i386-c.cc (ix86_target_macros_internal): Ditto.
+ * config/i386/i386-options.cc (processor_cost_table): Ditto.
+ (m_DIAMONDRAPIDS): New.
+ (m_CORE_AVX512): Add diamondrapids.
+ * config/i386/i386.h (enum processor_type): Ditto.
+ * doc/extend.texi: Ditto.
+ * doc/invoke.texi: Ditto.
+
+2024-11-11 Haochen Jiang <haochen.jiang@intel.com>
+
+ * common/config/i386/cpuinfo.h (get_intel_cpu): Add new model
+ number for Arrow Lake.
+
+2024-11-11 liuhongt <hongtao.liu@intel.com>
+
+ * config/i386/i386.md (truncsf2bf2): Add !flag_rounding_math
+ to the condition, require flag_unsafe_math_optimizations when
+ native instruction is not available.
+ * config/i386/mmx.md: (truncv2sfv2bf2): Ditto.
+ (extendv2bfv2sf2): Add !HONOR_NANS (BFmode) to the condition.
+ * config/i386/sse.md: (truncv4sfv4sf2): Add
+ !flag_rounding_math to the condition, require
+ flag_unsafe_math_optimizations when native instruction is not
+ available.
+ (truncv8sfv8bf2): Ditto.
+ (truncv16sfv16bf2): Ditto.
+ (extendv4bfv4sf2): Add !HONOR_NANS (BFmode) to the condition.
+ (extendv8bfv8sf2): Ditto.
+ (extendv16bfv16sf2): Ditto.
+
2024-11-10 Richard Biener <rguenther@suse.de>
* tree-vect-slp.cc (vectorizable_slp_permutation_1): Return
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 31b8ebf7ebe2..353869c3cbaf 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20241111
+20241112
diff --git a/gcc/c-family/ChangeLog b/gcc/c-family/ChangeLog
index 5b98fb6673b0..4f59804b594c 100644
--- a/gcc/c-family/ChangeLog
+++ b/gcc/c-family/ChangeLog
@@ -1,3 +1,15 @@
+2024-11-11 Jason Merrill <jason@redhat.com>
+
+ * c.opt: Add -fmodules with same effect as -fmodules-ts.
+
+2024-11-11 Jakub Jelinek <jakub@redhat.com>
+
+ * c-common.h (enum rid): Add RID_BUILTIN_OPERATOR_NEW
+ and RID_BUILTIN_OPERATOR_DELETE.
+ (names_builtin_p): Change return type from bool to int.
+ * c-common.cc (c_common_reswords): Add __builtin_operator_new
+ and __builtin_operator_delete.
+
2024-11-07 Paul Iannetta <piannetta@kalrayinc.com>
* c-pragma.cc (struct pragma_pp_data): Use (struct internal_pragma_handler);
diff --git a/gcc/c/ChangeLog b/gcc/c/ChangeLog
index ca460e47ac8b..1cd828cb0d93 100644
--- a/gcc/c/ChangeLog
+++ b/gcc/c/ChangeLog
@@ -1,3 +1,8 @@
+2024-11-11 Jakub Jelinek <jakub@redhat.com>
+
+ * c-decl.cc (names_builtin_p): Change return type from
+ bool to int, adjust return statments.
+
2024-11-09 Martin Uecker <uecker@tugraz.at>
PR c/116284
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 2fbac8f8ba6c..58cd457034f9 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -1,3 +1,37 @@
+2024-11-11 Jason Merrill <jason@redhat.com>
+
+ * Make-lang.in: Also collect tags from libcody and c++tools.
+
+2024-11-11 Jason Merrill <jason@redhat.com>
+
+ * lang-specs.h: Check fmodules* instead of fmodules-ts.
+
+2024-11-11 Simon Martin <simon@nasilyan.com>
+
+ PR c++/117463
+ * constexpr.cc (cxx_placement_new_fn): Implement in terms of
+ std_placement_new_fn_p.
+ * cp-tree.h (std_placement_new_fn_p): Declare.
+ * init.cc (std_placement_new_fn_p): Add missing checks to ensure
+ that fndecl is a non-replaceable ::operator new.
+
+2024-11-11 Jakub Jelinek <jakub@redhat.com>
+
+ * parser.cc (cp_parser_postfix_expression): Handle
+ RID_BUILTIN_OPERATOR_NEW and RID_BUILTIN_OPERATOR_DELETE.
+ * cp-objcp-common.cc (names_builtin_p): Change return type from
+ bool to int, adjust return statments. Handle
+ RID_BUILTIN_OPERATOR_NEW and RID_BUILTIN_OPERATOR_DELETE.
+ * pt.cc (tsubst_expr) <case CALL_EXPR>: Handle
+ CALL_FROM_NEW_OR_DELETE_P.
+
+2024-11-11 Jason Merrill <jason@redhat.com>
+
+ * cp-tree.h (struct ptrmem_cst): Change tree_common to tree_typed.
+ (struct tree_trait_expr): Likewise.
+ (struct tree_static_assert): Change tree_common to tree_base.
+ (struct tree_argument_pack_select): Likewise.
+
2024-11-10 Lewis Hyatt <lhyatt@gmail.com>
* cp-objcp-common.cc (cp_common_init_ts): Change TRAIT_EXPR from
diff --git a/gcc/fortran/ChangeLog b/gcc/fortran/ChangeLog
index 8f2f1d9c281a..326f0713673c 100644
--- a/gcc/fortran/ChangeLog
+++ b/gcc/fortran/ChangeLog
@@ -1,3 +1,26 @@
+2024-11-11 Paul Thomas <pault@gcc.gnu.org>
+
+ PR fortran/109345
+ * trans-array.cc (gfc_get_array_span): Unlimited polymorphic
+ expressions are now treated separately since the span need not
+ be the same as the element size.
+
+2024-11-11 Tomas Trnka <trnka@scm.com>
+ Paul Thomas <pault@gcc.gnu.org>
+
+ PR fortran/116388
+ * class.cc (finalize_component): Leading underscore in the name
+ of 'byte_stride' to suppress invalid finalization.
+
+2024-11-11 Thomas Koenig <tkoenig@gcc.gnu.org>
+
+ * check.cc (gfc_check_complex): Reject UNSIGNED.
+ * gfortran.texi: Update example program. Note that
+ CMPLX, INT and REAL also take unsigned arguments.
+ * intrinsic.texi (CMPLX): Document UNSIGNED.
+ (INT): Likewise.
+ (REAL): Likewise.
+
2024-11-06 Paul Thomas <pault@gcc.gnu.org>
PR fortran/117434
diff --git a/gcc/m2/ChangeLog b/gcc/m2/ChangeLog
index af7fc09a774f..e8a818d3563f 100644
--- a/gcc/m2/ChangeLog
+++ b/gcc/m2/ChangeLog
@@ -1,3 +1,292 @@
+2024-11-11 Gaius Mulley <gaiusmod2@gmail.com>
+
+ * gm2-compiler/M2Base.def (MixTypes): Rename parameters.
+ (MixTypesDecl): New procedure function.
+ * gm2-compiler/M2Base.mod (BuildOrdFunctions): Add
+ DefProcedure parameter to PutFunction.
+ (BuildTruncFunctions): Ditto.
+ (BuildFloatFunctions): Ditto.
+ (BuildIntFunctions): Ditto.
+ (InitBaseFunctions): Ditto.
+ (MixTypesDecl): New procedure function.
+ (MixTypes): Reimplement.
+ * gm2-compiler/M2Check.mod (checkProcType): Replace
+ NoOfParam with NoOfParamAny.
+ Replace IsVarParam with IsVarParamAny.
+ (checkProcedureProcType): Ditto.
+ * gm2-compiler/M2Error.def: Remove unnecessary export qualified list.
+ * gm2-compiler/M2GCCDeclare.mod: Replace NoOfParam with NoOfParamAny.
+ Replace IsVarParam with IsVarParamAny.
+ (DeclareProcedureToGccWholeProgram): Rename son to
+ Variable.
+ (DeclareProcedureToGccSeparateProgram): Ditto.
+ (PrintKind): New procedure.
+ (PrintProcedureParameters): Ditto.
+ (PrintProcedureReturnType): Ditto.
+ (PrintProcedure): Reimplement.
+ (PrintProcTypeParameters): New procedure.
+ (PrintProcType): Ditto.
+ (DeclareProcType): Rename Son to Parameter.
+ * gm2-compiler/M2GenGCC.mod: Replace NoOfParam with NoOfParamAny.
+ Replace IsVarParam with IsVarParamAny.
+ (ErrorMessageDecl): New procedure.
+ (checkIncorrectMeta): Replace call to MetaErrorT2 with
+ ErrorMessageDecl.
+ (ComparisonMixTypes): Add varleft and varright parameters.
+ Adjust all callers of ComparisonMixTypes.
+ * gm2-compiler/M2MetaError.def (MetaErrorDecl): New procedure.
+ * gm2-compiler/M2MetaError.mod (MetaErrorDecl): New procedure.
+ * gm2-compiler/M2Options.def (SetXCode): Add -fd flag description
+ to comment.
+ * gm2-compiler/M2Options.mod (SetXCode): Add -fd flag description
+ to comment.
+ * gm2-compiler/M2Quads.mod (CheckBreak): New procedure.
+ Replace NoOfParam with NoOfParamAny.
+ Replace IsVarParam with IsVarParamAny.
+ (FailParameter): Reimplement using GetVarDeclFullTok.
+ Generate message for formal parameter, actual parameter and
+ declaration of actual parameter.
+ (WarnParameter): Ditto.
+ (CheckBuildFunction): Reimplement error message using MetaErrorT1.
+ * gm2-compiler/M2Range.mod: Replace NoOfParam with NoOfParamAny.
+ Replace IsVarParam with IsVarParamAny.
+ * gm2-compiler/M2Scaffold.mod (DeclareScaffoldFunctions): Call
+ PutProcedureDefined after every procedure declaration.
+ (DeclareArgEnvParams): Add ProperProcedure parameter to PutParam.
+ * gm2-compiler/M2Size.mod (MakeSize): Add DefProcedure parameter
+ to PutFunction.
+ * gm2-compiler/M2Swig.mod: Replace NoOfParam with NoOfParamAny.
+ Replace IsVarParam with IsVarParamAny.
+ * gm2-compiler/M2SymInit.mod: Ditto.
+ * gm2-compiler/M2System.mod (InitSystem): Add DefProcedure
+ parameter to PutFunction.
+ * gm2-compiler/P1SymBuild.mod (StartBuildProcedure): Reimplement.
+ (EndBuildProcedure): Ditto.
+ (EndBuildForward): Ditto.
+ * gm2-compiler/P2Build.bnf (BuildProcedureDefinedByForward):
+ Remove.
+ (BuildProcedureDefinedByProper): Ditto.
+ (ForwardDeclaration): Remove BuildProcedureDefinedByForward.
+ (BuildNoReturnAttribute): Remove parameter.
+ * gm2-compiler/P2SymBuild.def (BuildNoReturnAttribute): Remove
+ parameter.
+ (BuildProcedureDefinedByForward): Remove.
+ (BuildProcedureDefinedByProper): Ditto.
+ * gm2-compiler/P2SymBuild.mod (Import): Remove
+ AreParametersDefinedInDefinition,
+ AreParametersDefinedInImplementation,
+ AreProcedureParametersDefined,
+ ParametersDefinedInDefinition,
+ ParametersDefinedInImplementation,
+ GetProcedureDeclaredDefinition,
+ GetProcedureDeclaredForward,
+ GetProcedureDeclaredProper,
+ GetParametersDefinedByForward,
+ GetParametersDefinedByProper and
+ PutProcedureNoReturn.
+ Add PutProcedureParametersDefined,
+ GetProcedureParametersDefined,
+ GetProcedureKindDesc,
+ GetProcedureDeclaredTok,
+ GetProcedureKind,
+ GetReturnTypeTok,
+ SetReturnOptional,
+ IsReturnOptional,
+ PutProcedureNoReturn and
+ PutProcedureDefined.
+ (Debug): New procedure.
+ (P2StartBuildDefModule): Space formatting.
+ (BuildVariable): Reimplement to record full declaration.
+ (StartBuildProcedure): Reimplement using token to determine
+ the kind of procedure.
+ (BuildProcedureHeading): Ditto.
+ (BuildFPSection): Ditto.
+ (BuildVarArgs): Ditto.
+ (BuildOptArg): Ditto.
+ (BuildProcedureDefinedByForward): Remove.
+ (BuildProcedureDefinedByProper): Ditto.
+ (BuildFormalParameterSection): Reimplement so that the
+ quad stack is unchanged.
+ (CheckFormalParameterSection): Ditto.
+ (RemoveFPParameters): New procedure.
+ (ParameterError): Reimplement.
+ (StartBuildFormalParameters): Add annotation.
+ (ParameterMismatch): Reimplement.
+ (EndBuildFormalParameters): Reimplement to check against
+ all procedure kinds.
+ (GetSourceDesc): Remove.
+ (GetCurSrcDesc): Ditto.
+ (GetDeclared): Ditto.
+ (ReturnTypeMismatch): Reimplement.
+ (BuildFunction): Ditto.
+ (BuildOptFunction): Ditto.
+ (CheckOptFunction): New procedure.
+ (BuildNoReturnAttribute): Remove parameter and obtain
+ procedure symbol from quad stack.
+ (CheckProcedureReturn): New procedure.
+ * gm2-compiler/P3SymBuild.mod (BuildOptArgInitializer):
+ Preserve ProcSym tok on the quad stack.
+ Add Assert.
+ * gm2-compiler/PCSymBuild.mod (fixupProcedureType): Replace
+ NoOfParam with NoOfParamAny.
+ * gm2-compiler/SymbolTable.def (GetNthParam): Add ProcedureKind
+ parameter.
+ (PutFunction): Ditto.
+ (PutOptFunction): Ditto.
+ (IsReturnOptional): Ditto.
+ (PutParam): Ditto.
+ (PutVarParam): Ditto.
+ (PutParamName): Ditto.
+ (PutProcedureNoReturn): Ditto.
+ (IsProcedureNoReturn): Ditto.
+ (IsVarParam): Ditto.
+ (IsUnboundedParam): Ditto.
+ (NoOfParam): Ditto.
+ (ForeachLocalSymDo): Ditto.
+ (GetProcedureKind): Ditto.
+ (GetProcedureDeclaredTok): Ditto.
+ (PutProcedureDeclaredTok): Ditto.
+ (GetReturnTypeTok): Ditto.
+ (PutReturnTypeTok): Ditto.
+ (PutParametersDefinedByForward): New procedure.
+ (PutProcedureParametersDefined): Ditto.
+ (PutProcedureDefined): Ditto.
+ (GetParametersDefinedByProper): Ditto.
+ (GetProcedureDeclaredForward): Ditto.
+ (GetProcedureDeclaredProper): Ditto.
+ (PutProcedureDeclaredProper): Ditto.
+ (GetProcedureDeclaredDefinition): Ditto.
+ (PutProcedureDeclaredDefinition): Ditto.
+ (GetProcedureDefined): Ditto.
+ (PutUseOptArg): Ditto.
+ (UsesOptArg): Ditto.
+ (PutOptArgInit): Ditto.
+ (SetReturnOptional): Ditto.
+ (UsesOptArgAny): Ditto.
+ (GetProcedureKindDesc): Ditto.
+ (IsReturnOptionalAny): New procedure function.
+ (GetNthParamAny): Ditto.
+ (NoOfParamAny): Ditto.
+ (IsProcedureAnyNoReturn): Ditto.
+ (AreParametersDefinedInImplementation): Remove.
+ (ParametersDefinedInImplementation): Ditto.
+ (AreParametersDefinedInDefinition): Ditto.
+ (AreProcedureParametersDefined): Ditto.
+ (ParametersDefinedInDefinition): Ditto.
+ (ProcedureParametersDefined): Ditto.
+ (PutParametersDefinedByProper): Ditto.
+ (PutProcedureDeclaredForward): Ditto.
+ (GetParametersDefinedByForward): Ditto.
+ (GetProcedureParametersDefined): Ditto.
+ (PushOffset): Ditto.
+ (PopSize): Ditto.
+ (PushParamSize): Ditto.
+ (PushSumOfLocalVarSize): Ditto.
+ (PushSumOfParamSize): Ditto.
+ (PopOffset): Ditto.
+ (PopSumOfParamSize): Ditto.
+ * gm2-compiler/SymbolTable.mod (MakeProcedure): Reimplement.
+ (PutProcedureNoReturn): Add ProcedureKind parameter.
+ (GetNthParam): Ditto.
+ (PutFunction): Ditto.
+ (PutOptFunction): Ditto.
+ (IsReturnOptional): Ditto.
+ (MakeVariableForParam): Ditto.
+ (PutParam): Ditto.
+ (PutVarParam): Ditto.
+ (PutParamName): Ditto.
+ (AddParameter): Ditto.
+ (IsVarParam): Ditto.
+ (IsVarParamAny): Ditto.
+ (NoOfParam): Ditto.
+ (HasVarParameters): Ditto.
+ (IsUnboundedParam): Ditto.
+ (PutUseVarArgs): Ditto.
+ (UsesVarArgs): Ditto.
+ (PutUseOptArg): Ditto.
+ (UsesOptArg): Ditto.
+ (UsesOptArgAny): Ditto.
+ (PutOptArgInit): Ditto.
+ (IsProcedure): Ditto.
+ (IsPointer): Ditto.
+ (IsRecord): Ditto.
+ (IsArray): Ditto.
+ (IsEnumeration): Ditto.
+ (IsUnbounded): Ditto.
+ (IsSet): Ditto.
+ (IsSetPacked): Ditto.
+ (CheckUnbounded): Ditto.
+ (IsOAFamily): Ditto.
+ (IsModuleWithinProcedure): Ditto.
+ (GetDeclaredDef): Ditto.
+ (GetDeclaredMod): Ditto.
+ (GetDeclaredFor): Ditto.
+ (GetProcedureDeclaredForward): Ditto.
+ (GetProcedureKind): Ditto.
+ (PutProcedureDeclaredForward): Ditto.
+ (GetProcedureDeclaredTok): Ditto.
+ (GetProcedureDeclaredProper): Ditto.
+ (PutProcedureDeclaredTok): Ditto.
+ (PutProcedureDeclaredProper): Ditto.
+ (GetReturnTypeTok): Ditto.
+ (GetProcedureDeclaredDefinition): Ditto.
+ (PutReturnTypeTok): Ditto.
+ (PutProcedureDeclaredDefinition): Ditto.
+ (GetProcedureKindDesc): Ditto.
+ (IsProcedureVariable): Ditto.
+ (IsAModula2Type): Ditto.
+ (GetParam): Ditto.
+ (ProcedureParametersDefined): Ditto.
+ (AreParametersDefinedInImplementation): Remove.
+ (AreParametersDefinedInDefinition): Ditto.
+ (AreProcedureParametersDefined): Ditto.
+ (IsSizeSolved): Ditto.
+ (IsOffsetSolved): Ditto.
+ (IsValueSolved): Ditto.
+ (IsSumOfParamSizeSolved): Ditto.
+ (PushSize): Ditto.
+ (PushOffset): Ditto.
+ (PopSize): Ditto.
+ (PushValue): Ditto.
+ (PushParamSize): Ditto.
+ (PushSumOfLocalVarSize): Ditto.
+ (PushSumOfParamSize): Ditto.
+ (PushVarSize): Ditto.
+ (PopValue): Ditto.
+ (PopSize): Ditto.
+ (PopOffset): Ditto.
+ (PopSumOfParamSize): Ditto.
+ (PutParametersDefinedByForward): New procedure.
+ (PutProcedureParametersDefined): Ditto.
+ (PutProcedureDefined): Ditto.
+ (GetParametersDefinedByProper): Ditto.
+ (GetProcedureDeclaredForward): Ditto.
+ (GetProcedureDeclaredProper): Ditto.
+ (PutProcedureDeclaredProper): Ditto.
+ (GetProcedureDeclaredDefinition): Ditto.
+ (PutProcedureDeclaredDefinition): Ditto.
+ (GetProcedureDefined): Ditto.
+ (PutUseOptArg): Ditto.
+ (UsesOptArg): Ditto.
+ (PutOptArgInit): Ditto.
+ (SetReturnOptional): Ditto.
+ (UsesOptArgAny): Ditto.
+ (GetProcedureKindDesc): Ditto.
+ (PutParametersDefinedByProper): Ditto.
+ (GetParametersDefinedByProper): Ditto.
+ (IsReturnOptionalAny): New procedure function.
+ (IsProcedureAnyDefaultBoolean): Ditto.
+ (IsProcedureAnyBoolean): Ditto.
+ (IsProcedureAnyNoReturn): Ditto.
+ (GetNthParamAny): Ditto.
+ (NoOfParamAny): Ditto.
+ (IsProcedureAnyNoReturn): Ditto.
+ (GetProcedureKind): Ditto.
+ (IsVarParamAny): Ditto.
+ (IsUnboundedParamAny): Ditto.
+ (ForeachParamSymDo): New comment.
+ * gm2-libs-coroutines/SYSTEM.mod: Reformat.
+
2024-11-09 Jakub Jelinek <jakub@redhat.com>
* Make-lang.in (m2_OBJS): Add $(BUILD-LIBS-BOOT),
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 3848d0c89624..2d8f35896610 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,630 @@
+2024-11-11 Simon Martin <simon@nasilyan.com>
+
+ PR c++/117463
+ * g++.dg/init/new54.C: New test.
+
+2024-11-11 Jakub Jelinek <jakub@redhat.com>
+
+ * g++.dg/ext/builtin-operator-new-1.C: New test.
+ * g++.dg/ext/builtin-operator-new-2.C: New test.
+ * g++.dg/ext/builtin-operator-new-3.C: New test.
+
+2024-11-11 Dimitar Dimitrov <dimitar@dinux.eu>
+
+ * gcc.dg/c2y-if-decls-1.c: Require target that supports atomic
+ operations on int and long types.
+ * gcc.dg/c2y-if-decls-11.c: Ditto.
+ * gcc.dg/c2y-if-decls-4.c: Ditto.
+ * gcc.dg/c2y-if-decls-8.c: Ditto.
+
+2024-11-11 Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
+
+ * gcc.dg/vect/complex/fast-math-complex-add-half-float.c: Remove
+ xfail from test.
+
+2024-11-11 Claudio Bantaloukas <claudio.bantaloukas@arm.com>
+
+ * gcc.target/aarch64/fp8_scalar_1.c:
+
+2024-11-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ * gcc.target/aarch64/pragma_cpp_predefs_3.c: Add SVE2p1 tests.
+
+2024-11-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ * gcc.target/aarch64/sve/acle/general-c/load_ext_gather_index_1.c,
+ * gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_1.c,
+ * gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_2.c,
+ * gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_3.c,
+ * gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_4.c,
+ * gcc.target/aarch64/sve/acle/general-c/load_ext_gather_offset_5.c:
+ Adjust the "did you mean" suggestion.
+ * gcc.target/aarch64/sve/acle/general-c/ld1sh_gather_1.c: Removed.
+ * gcc.target/aarch64/sve/acle/general-c/extq_1.c: New test.
+ * gcc.target/aarch64/sve/acle/general-c/load_gather64_sv_index_1.c: Likewise.
+ * gcc.target/aarch64/sve/acle/general-c/load_gather64_sv_offset_1.c: Likewise.
+ * gcc.target/aarch64/sve/acle/general-c/pmov_from_vector_1.c: Likewise.
+ * gcc.target/aarch64/sve/acle/general-c/pmov_from_vector_lane_1.c: Likewise.
+ * gcc.target/aarch64/sve/acle/general-c/pmov_to_vector_lane_1.c: Likewise.
+ * gcc.target/aarch64/sve/acle/general-c/pmov_to_vector_lane_2.c: Likewise.
+ * gcc.target/aarch64/sve/acle/general-c/store_scatter64_1.c: Likewise.
+ * gcc.target/aarch64/sve/acle/general-c/store_scatter64_index_1.c: Likewise.
+ * gcc.target/aarch64/sve/acle/general-c/store_scatter64_offset_1.c: Likewise.
+ * gcc.target/aarch64/sve/acle/general-c/unary_lane_1.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/addqv_f16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/addqv_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/addqv_f64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/addqv_s16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/addqv_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/addqv_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/addqv_s8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/addqv_u16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/addqv_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/addqv_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/addqv_u8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/andqv_s16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/andqv_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/andqv_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/andqv_s8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/andqv_u16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/andqv_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/andqv_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/andqv_u8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/dup_laneq_bf16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/dup_laneq_f16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/dup_laneq_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/dup_laneq_f64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/dup_laneq_s16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/dup_laneq_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/dup_laneq_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/dup_laneq_s8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/dup_laneq_u16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/dup_laneq_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/dup_laneq_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/dup_laneq_u8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/eorqv_s16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/eorqv_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/eorqv_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/eorqv_s8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/eorqv_u16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/eorqv_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/eorqv_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/eorqv_u8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/extq_bf16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/extq_f16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/extq_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/extq_f64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/extq_s16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/extq_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/extq_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/extq_s8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/extq_u16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/extq_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/extq_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/extq_u8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1q_gather_bf16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1q_gather_f16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1q_gather_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1q_gather_f64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1q_gather_s16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1q_gather_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1q_gather_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1q_gather_s8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1q_gather_u16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1q_gather_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1q_gather_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1q_gather_u8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1udq_f64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1udq_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1udq_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1uwq_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1uwq_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1uwq_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld2q_bf16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld2q_f16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld2q_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld2q_f64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld2q_s16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld2q_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld2q_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld2q_s8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld2q_u16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld2q_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld2q_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld2q_u8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld3q_bf16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld3q_f16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld3q_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld3q_f64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld3q_s16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld3q_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld3q_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld3q_s8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld3q_u16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld3q_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld3q_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld3q_u8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld4q_bf16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld4q_f16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld4q_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld4q_f64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld4q_s16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld4q_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld4q_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld4q_s8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld4q_u16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld4q_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld4q_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld4q_u8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/maxnmqv_f16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/maxnmqv_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/maxnmqv_f64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/maxqv_f16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/maxqv_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/maxqv_f64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/maxqv_s16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/maxqv_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/maxqv_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/maxqv_s8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/maxqv_u16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/maxqv_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/maxqv_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/maxqv_u8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/minnmqv_f16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/minnmqv_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/minnmqv_f64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/minqv_f16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/minqv_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/minqv_f64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/minqv_s16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/minqv_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/minqv_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/minqv_s8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/minqv_u16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/minqv_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/minqv_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/minqv_u8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/orqv_s16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/orqv_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/orqv_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/orqv_s8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/orqv_u16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/orqv_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/orqv_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/orqv_u8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/pmov_s16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/pmov_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/pmov_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/pmov_s8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/pmov_u16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/pmov_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/pmov_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/pmov_u8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1dq_f64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1dq_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1dq_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1q_scatter_bf16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1q_scatter_f16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1q_scatter_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1q_scatter_f64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1q_scatter_s16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1q_scatter_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1q_scatter_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1q_scatter_s8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1q_scatter_u16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1q_scatter_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1q_scatter_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1q_scatter_u8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1wq_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1wq_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1wq_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st2q_bf16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st2q_f16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st2q_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st2q_f64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st2q_s16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st2q_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st2q_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st2q_s8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st2q_u16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st2q_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st2q_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st2q_u8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st3q_bf16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st3q_f16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st3q_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st3q_f64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st3q_s16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st3q_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st3q_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st3q_s8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st3q_u16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st3q_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st3q_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st3q_u8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st4q_bf16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st4q_f16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st4q_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st4q_f64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st4q_s16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st4q_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st4q_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st4q_s8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st4q_u16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st4q_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st4q_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st4q_u8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/tblq_bf16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/tblq_f16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/tblq_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/tblq_f64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/tblq_s16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/tblq_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/tblq_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/tblq_s8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/tblq_u16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/tblq_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/tblq_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/tblq_u8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/tbxq_bf16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/tbxq_f16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/tbxq_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/tbxq_f64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/tbxq_s16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/tbxq_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/tbxq_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/tbxq_s8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/tbxq_u16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/tbxq_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/tbxq_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/tbxq_u8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/uzpq1_bf16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/uzpq1_f16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/uzpq1_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/uzpq1_f64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/uzpq1_s16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/uzpq1_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/uzpq1_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/uzpq1_s8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/uzpq1_u16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/uzpq1_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/uzpq1_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/uzpq1_u8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/uzpq2_bf16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/uzpq2_f16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/uzpq2_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/uzpq2_f64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/uzpq2_s16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/uzpq2_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/uzpq2_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/uzpq2_s8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/uzpq2_u16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/uzpq2_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/uzpq2_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/uzpq2_u8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/zipq1_bf16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/zipq1_f16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/zipq1_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/zipq1_f64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/zipq1_s16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/zipq1_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/zipq1_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/zipq1_s8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/zipq1_u16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/zipq1_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/zipq1_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/zipq1_u8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/zipq2_bf16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/zipq2_f16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/zipq2_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/zipq2_f64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/zipq2_s16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/zipq2_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/zipq2_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/zipq2_s8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/zipq2_u16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/zipq2_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/zipq2_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/zipq2_u8.c: Likewise.
+ * gcc.target/aarch64/sve2/dupq_1.c: Likewise.
+ * gcc.target/aarch64/sve2/extq_1.c: Likewise.
+ * gcc.target/aarch64/sve2/uzpq_1.c: Likewise.
+ * gcc.target/aarch64/sve2/zipq_1.c: Likewise.
+
+2024-11-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ * gcc.target/aarch64/sve/clamp_3.c: New test.
+ * gcc.target/aarch64/sve/clamp_4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/bfmlslb_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/bfmlslb_lane_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/bfmlslt_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/bfmlslt_lane_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/clamp_f16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/clamp_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/clamp_f64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/cntp_c16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/cntp_c32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/cntp_c64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/cntp_c8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/dot_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/dot_lane_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/dot_lane_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/dot_lane_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/dot_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/dot_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1_bf16_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1_bf16_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1_f16_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1_f16_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1_f32_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1_f32_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1_f64_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1_f64_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1_s16_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1_s16_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1_s32_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1_s32_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1_s64_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1_s64_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1_s8_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1_s8_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1_u16_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1_u16_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1_u32_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1_u32_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1_u64_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1_u64_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1_u8_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ld1_u8_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ldnt1_bf16_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ldnt1_bf16_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ldnt1_f16_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ldnt1_f16_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ldnt1_f32_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ldnt1_f32_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ldnt1_f64_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ldnt1_f64_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ldnt1_s16_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ldnt1_s16_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ldnt1_s32_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ldnt1_s32_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ldnt1_s64_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ldnt1_s64_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ldnt1_s8_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ldnt1_s8_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ldnt1_u16_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ldnt1_u16_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ldnt1_u32_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ldnt1_u32_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ldnt1_u64_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ldnt1_u64_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ldnt1_u8_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ldnt1_u8_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/pext_lane_c16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/pext_lane_c16_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/pext_lane_c32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/pext_lane_c32_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/pext_lane_c64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/pext_lane_c64_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/pext_lane_c8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/pext_lane_c8_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ptrue_c16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ptrue_c32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ptrue_c64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/ptrue_c8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/qcvtn_s16_s32_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/qcvtn_u16_s32_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/qcvtn_u16_u32_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/qrshrn_s16_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/qrshrn_u16_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/qrshrun_u16_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1_bf16_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1_bf16_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1_f16_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1_f16_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1_f32_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1_f32_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1_f64_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1_f64_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1_s16_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1_s16_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1_s32_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1_s32_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1_s64_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1_s64_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1_s8_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1_s8_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1_u16_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1_u16_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1_u32_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1_u32_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1_u64_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1_u64_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1_u8_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/st1_u8_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/stnt1_bf16_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/stnt1_bf16_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/stnt1_f16_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/stnt1_f16_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/stnt1_f32_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/stnt1_f32_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/stnt1_f64_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/stnt1_f64_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/stnt1_s16_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/stnt1_s16_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/stnt1_s32_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/stnt1_s32_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/stnt1_s64_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/stnt1_s64_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/stnt1_s8_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/stnt1_s8_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/stnt1_u16_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/stnt1_u16_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/stnt1_u32_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/stnt1_u32_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/stnt1_u64_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/stnt1_u64_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/stnt1_u8_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/stnt1_u8_x4.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilege_b16_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilege_b32_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilege_b64_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilege_b8_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilege_c16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilege_c32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilege_c64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilege_c8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilegt_b16_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilegt_b32_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilegt_b64_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilegt_b8_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilegt_c16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilegt_c32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilegt_c64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilegt_c8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilele_b16_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilele_b32_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilele_b64_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilele_b8_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilele_c16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilele_c32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilele_c64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilele_c8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilelt_b16_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilelt_b32_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilelt_b64_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilelt_b8_x2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilelt_c16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilelt_c32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilelt_c64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/whilelt_c8.c: Likewise.
+
+2024-11-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ * lib/target-supports.exp
+ (check_effective_target_aarch64_asm_sve2p1_ok): New procedure.
+ * gcc.target/aarch64/sve/clamp_1.c: New test.
+ * gcc.target/aarch64/sve/clamp_2.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/clamp_s16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/clamp_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/clamp_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/clamp_s8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/clamp_u16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/clamp_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/clamp_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/clamp_u8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/psel_lane_b16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/psel_lane_b32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/psel_lane_b64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/psel_lane_b8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/psel_lane_c16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/psel_lane_c32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/psel_lane_c64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/psel_lane_c8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/revd_bf16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/revd_f16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/revd_f32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/revd_f64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/revd_s16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/revd_s32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/revd_s64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/revd_s8.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/revd_u16.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/revd_u32.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/revd_u64.c: Likewise.
+ * gcc.target/aarch64/sve2/acle/asm/revd_u8.c: Likewise.
+
+2024-11-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ * gcc.target/aarch64/sve/acle/general-c/create_5.c: Expect svcreate4
+ to succeed for svbool_ts.
+ * gcc.target/aarch64/sve/acle/asm/test_sve_acle.h
+ (TEST_UNDEF_B): New macro.
+ * gcc.target/aarch64/sve/acle/asm/create4_1.c: Test _b form.
+ * gcc.target/aarch64/sve/acle/asm/undef2_1.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/undef4_1.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/get4_b.c: New test.
+ * gcc.target/aarch64/sve/acle/asm/set4_b.c: Likewise.
+ * gcc.target/aarch64/sve/acle/general-c/svboolx4_1.c: Likewise.
+
+2024-11-11 Richard Sandiford <richard.sandiford@arm.com>
+
+ * gcc.target/aarch64/sve/acle/asm/dup_lane_bf16.c: Wrap the second
+ TBL operand in braces
+ * gcc.target/aarch64/sve/acle/asm/dup_lane_f16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/dup_lane_f32.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/dup_lane_f64.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/dup_lane_s16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/dup_lane_s32.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/dup_lane_s64.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/dup_lane_s8.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/dup_lane_u16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/dup_lane_u32.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/dup_lane_u64.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/dup_lane_u8.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/tbl_bf16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/tbl_f16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/tbl_f32.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/tbl_f64.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/tbl_s16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/tbl_s32.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/tbl_s64.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/tbl_s8.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/tbl_u16.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/tbl_u32.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/tbl_u64.c: Likewise.
+ * gcc.target/aarch64/sve/acle/asm/tbl_u8.c: Likewise.
+ * gcc.target/aarch64/sve/slp_perm_6.c: Likewise.
+ * gcc.target/aarch64/sve/slp_perm_7.c: Likewise.
+ * gcc.target/aarch64/sve/vec_perm_1.c: Likewise.
+ * gcc.target/aarch64/sve/vec_perm_const_1.c: Likewise.
+ * gcc.target/aarch64/sve/vec_perm_const_1_overrun.c: Likewise.
+ * gcc.target/aarch64/sve/vec_perm_const_single_1.c: Likewise.
+ * gcc.target/aarch64/sve/vec_perm_single_1.c: Likewise.
+ * gcc.target/aarch64/sve/uzp1_1.c: Shorten the scan-assembler-nots
+ to just "\ttbl\".
+ * gcc.target/aarch64/sve/uzp2_1.c: Likewise.
+
+2024-11-11 Paul Thomas <pault@gcc.gnu.org>
+
+ PR fortran/109345
+ * gfortran.dg/character_workout_1.f90: Cut trailing whitespace.
+ * gfortran.dg/pr109345.f90: New test.
+
+2024-11-11 Richard Biener <rguenther@suse.de>
+
+ PR tree-optimization/117510
+ * gcc.dg/vect/vect-outer-pr117510.c: New testcase.
+
+2024-11-11 Gaius Mulley <gaiusmod2@gmail.com>
+
+ * gm2/iso/fail/badexpression3.mod: New test.
+ * gm2/iso/fail/badparam4.def: New test.
+ * gm2/iso/fail/badparam4.mod: New test.
+
+2024-11-11 Tomas Trnka <trnka@scm.com>
+ Paul Thomas <pault@gcc.gnu.org>
+
+ PR fortran/116388
+ * gfortran.dg/finalize_58.f90: New test.
+
+2024-11-11 Thomas Koenig <tkoenig@gcc.gnu.org>
+
+ * gfortran.dg/unsigned_41.f90: New test.
+
+2024-11-11 Haochen Jiang <haochen.jiang@intel.com>
+
+ * g++.target/i386/mv16.C: Ditto.
+ * gcc.target/i386/funcspec-56.inc: Handle new march.
+
+2024-11-11 liuhongt <hongtao.liu@intel.com>
+
+ * gcc.target/i386/avx512bf16-truncsfbf.c: Add -ffast-math.
+ * gcc.target/i386/avx512bw-extendbf2sf.c: Ditto.
+ * gcc.target/i386/avx512bw-truncsfbf.c: Ditto.
+ * gcc.target/i386/sse2-extendbf2sf.c: Ditto.
+ * gcc.target/i386/ssse3-truncsfbf.c: Ditto.
+
2024-11-09 Andrew Pinski <quic_apinski@quicinc.com>
PR middle-end/117492
diff --git a/libgomp/ChangeLog b/libgomp/ChangeLog
index 35588cba6164..5174914e0817 100644
--- a/libgomp/ChangeLog
+++ b/libgomp/ChangeLog
@@ -1,3 +1,13 @@
+2024-11-11 Tobias Burnus <tburnus@baylibre.com>
+
+ * testsuite/libgomp.c-c++-common/pr109062.c: Update dg-output
+ to also accept GOMP_SPINCOUNT = 1 for x86-64.
+
+2024-11-11 Tobias Burnus <tburnus@baylibre.com>
+
+ * plugin/plugin-gcn.c (isa_matches_agent): Mention the device number
+ and ROCR_VISIBLE_DEVICES when reporting an ISA mismatch error.
+
2024-11-10 Thomas Schwinge <tschwinge@baylibre.com>
* testsuite/libgomp.c/max_vf-1.c: Adjust.
diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index e57dbb21cc27..b759a50b0fa8 100644
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,23 @@
+2024-11-11 Jonathan Wakely <jwakely@redhat.com>
+
+ * include/bits/locale_conv.h (wstring_convert, wbuffer_convert):
+ Adjust strings passed to exception constructors.
+
+2024-11-11 Jonathan Wakely <jwakely@redhat.com>
+
+ PR libstdc++/117520
+ * include/std/text_encoding (aliases_view:_Iterator::operator+=):
+ Fix typos that caused == to be used instead of =.
+ (aliases_view::_Iterator): Fix friend declaration.
+ * testsuite/std/text_encoding/members.cc: Adjust expected
+ behaviour of invalid subscript. Add tests for other erroneous
+ operations on iterators.
+
+2024-11-11 Jonathan Wakely <jwakely@redhat.com>
+
+ * include/bits/unicode.h (_Utf_iterator::_M_read_utf16): Add
+ parentheses.
+
2024-11-08 Jakub Jelinek <jakub@redhat.com>
* libsupc++/new (::operator new, ::operator new[]): Add malloc
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