[gcc r13-1739] Daily bump.
GCC Administrator
gccadmin@gcc.gnu.org
Tue Jul 19 00:17:16 GMT 2022
https://gcc.gnu.org/g:79fb1124c8c31da3ca70ee3a07bf15f3d2d87ab7
commit r13-1739-g79fb1124c8c31da3ca70ee3a07bf15f3d2d87ab7
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Tue Jul 19 00:16:32 2022 +0000
Daily bump.
Diff:
---
gcc/ChangeLog | 112 ++++++++++++++++++++++++++++++++++++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/testsuite/ChangeLog | 21 +++++++++
libgcc/ChangeLog | 6 +++
libstdc++-v3/ChangeLog | 10 +++++
5 files changed, 150 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 994875f262d..43b70ba734c 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,115 @@
+2022-07-18 Andrew MacLeod <amacleod@redhat.com>
+
+ PR tree-optimization/106280
+ * value-relation.cc (dom_oracle::register_relation): Register
+ transitives only when it is possible for there to be one.
+ (dom_oracle::set_one_relation): Return NULL if this is an
+ existing relation.
+
+2022-07-18 Maciej W. Rozycki <macro@embecosm.com>
+
+ * doc/invoke.texi (RISC-V Options): Add index references for
+ `mrelax' and `mriscv-attribute'.
+
+2022-07-18 Maciej W. Rozycki <macro@embecosm.com>
+
+ * doc/invoke.texi (Option Summary): Add missing second space
+ around `-mstack-protector-guard-reg='.
+
+2022-07-18 Maciej W. Rozycki <macro@embecosm.com>
+
+ * doc/invoke.texi (Option Summary): Fix `-mno-riscv-attribute'.
+ (RISC-V Options): Likewise, and `-mriscv-attribute'.
+
+2022-07-18 Claudiu Zissulescu <claziss@gmail.com>
+
+ * config/arc/arc-arch.h (arc_tune_attr): Add
+ ARC_TUNE_ARCHS4X_REL31A variant.
+ * config/arc/arc.cc (arc_override_options): Tune options for
+ release 310a.
+ (arc_sched_issue_rate): Use correct enum.
+ (arc600_corereg_hazard): Textual change.
+ (arc_hazard): Add release 310a tunning.
+ * config/arc/arc.md (tune): Update and take into consideration new
+ tune option.
+ (tune_dspmpy): Likewise.
+ (tune_store): New attribute.
+ * config/arc/arc.opt (mtune): New tune option.
+ * config/arc/arcHS4x.md (hs4x_brcc0, hs4x_brcc1): New cpu units.
+ (hs4x_brcc_op): New instruction rezervation.
+ (hs4x_data_store_1_op): Likewise.
+ * config/arc/arc-cpus.def (hs4x_rel31): New cpu variant.
+ * config/arc/arc-tables.opt: Regenerate.
+ * config/arc/t-multilib: Likewise.
+ * doc/invoke.texi (ARC): Update mcpu and tune sections.
+
+2022-07-18 Richard Biener <rguenther@suse.de>
+
+ * tree-loop-distribution.cc (loop_distribution::distribute_loop):
+ When computing cost-based merging do not disregard builtin
+ classified partitions in some cases.
+
+2022-07-18 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR target/106253
+ * config/arm/arm-builtins.cc (arm_builtin_vectorized_function):
+ Delete.
+ * config/arm/arm-protos.h (arm_builtin_vectorized_function): Delete.
+ * config/arm/arm.cc (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION):
+ Delete.
+ * config/arm/arm_neon_builtins.def (copysignf): Delete.
+ * config/arm/iterators.md (nvrint_pattern): New attribute.
+ * config/arm/neon.md (<NEON_VRINT:nvrint_pattern><VCVTF:mode>2):
+ New pattern.
+ (l<NEON_VCVT:nvrint_pattern><su_optab><VCVTF:mode><v_cmp_result>2):
+ Likewise.
+ (neon_copysignf<mode>): Rename to...
+ (copysign<mode>3): ...this.
+
+2022-07-18 Claudiu Zissulescu <claziss@gmail.com>
+
+ * config/arc/arc.cc (arc_expand_epilogue): Adjust the frame
+ pointer first when in interrupts.
+
+2022-07-18 Richard Biener <rguenther@suse.de>
+
+ * tree-loop-distribution.cc (copy_loop_before): Add
+ the ability to replace the original LC PHI defs.
+ (generate_loops_for_partition): Pass through a flag
+ whether to redirect original LC PHI defs.
+ (generate_code_for_partition): Likewise.
+ (loop_distribution::distribute_loop): Compute the partition
+ that should provide the LC PHI defs for common reductions
+ and pass that down.
+
+2022-07-18 Richard Ball <richard.ball@arm.com>
+
+ * config/aarch64/aarch64.cc (aarch64_evpc_trn): Use std:swap.
+ (aarch64_evpc_uzp): Likewise.
+ (aarch64_evpc_zip): Likewise.
+
+2022-07-18 Roger Sayle <roger@nextmovesoftware.com>
+
+ PR target/106231
+ * config/i386/i386.md (*ctzsidi2_<s>ext): New insn_and_split
+ to recognize any_extend:DI of ctz:SI which is implicitly extended.
+ (*ctzsidi2_<s>ext_falsedep): New define_insn to model a DImode
+ extended ctz:SI that has preceding xor to break false dependency.
+
+2022-07-18 Roger Sayle <roger@nextmovesoftware.com>
+
+ * config/i386/predicates.md (x86_64_const_vector_operand):
+ Check the operand's mode matches the specified mode argument.
+
+2022-07-18 Roger Sayle <roger@nextmovesoftware.com>
+
+ * config/i386/sse.md (kunpckhi): Add UNSPEC_MASKOP unspec.
+ (kunpcksi): Likewise, add UNSPEC_MASKOP unspec.
+ (kunpckdi): Likewise, add UNSPEC_MASKOP unspec.
+ (vec_pack_trunc_qi): Update to specify the now required
+ UNSPEC_MASKOP unspec.
+ (vec_pack_trunc_<mode>): Likewise.
+
2022-07-16 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
* config/xtensa/xtensa.md
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 2ac54796c00..a394c7af9b5 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20220718
+20220719
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index cc8ea71642a..36913da85cf 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,24 @@
+2022-07-18 Richard Biener <rguenther@suse.de>
+
+ * gcc.dg/tree-ssa/ldist-24.c: XFAIL.
+ * gcc.dg/tree-ssa/ldist-36.c: Adjust expected outcome.
+
+2022-07-18 Richard Sandiford <richard.sandiford@arm.com>
+
+ PR target/106253
+ * gcc.target/arm/vect_unary_1.c: New test.
+ * gcc.target/arm/vect_binary_1.c: Likewise.
+
+2022-07-18 Claudiu Zissulescu <claziss@gmail.com>
+
+ * gcc.target/arc/interrupt-13.c: New file.
+
+2022-07-18 Roger Sayle <roger@nextmovesoftware.com>
+
+ PR target/106231
+ * gcc.target/i386/pr106231-1.c: New test case.
+ * gcc.target/i386/pr106231-2.c: New test case.
+
2022-07-15 H.J. Lu <hjl.tools@gmail.com>
PR target/85620
diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog
index f4591e1933c..fcae8df1410 100644
--- a/libgcc/ChangeLog
+++ b/libgcc/ChangeLog
@@ -1,3 +1,9 @@
+2022-07-18 Claudiu Zissulescu <claziss@synopsys.com>
+
+ * config/arc/lib2funcs.c (udivmodsi4): Update AND mask.
+ * config/arc/lib1funcs.S (umodsi3): Don't use it for RF16
+ configurations.
+
2022-06-25 Jeff Law <jeffreyalaw@gmail.com>
* config.host: Removed tilegx and tilepro entries.
diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index 1980646dd80..eb1486fcee3 100644
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,13 @@
+2022-07-18 François Dumont <fdumont@gcc.gnu.org>
+
+ * include/bits/stl_algo.h
+ (__merge_adaptive): Adapt to merge only when buffer is large enough..
+ (__merge_adaptive_resize): New, adapt merge when buffer is too small.
+ (__inplace_merge): Adapt, use latter.
+ (__stable_sort_adaptive): Adapt to sort only when buffer is large enough.
+ (__stable_sort_adaptive_resize): New, adapt sort when buffer is too small.
+ (__stable_sort): Adapt, use latter.
+
2022-07-15 Marek Polacek <polacek@redhat.com>
PR c++/104477
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