[gcc(refs/vendors/redhat/heads/gcc-10-branch)] Adjust ChangeLog files.
Jakub Jelinek
jakub@gcc.gnu.org
Sat Jan 18 17:10:00 GMT 2020
https://gcc.gnu.org/g:cef2a35ef0b6b1f728face9ba5530f0eb69b1d50
commit cef2a35ef0b6b1f728face9ba5530f0eb69b1d50
Author: Jakub Jelinek <jakub@redhat.com>
Date: Sat Jan 18 18:02:09 2020 +0100
Adjust ChangeLog files.
Diff:
---
gcc/ChangeLog | 126 ------------------------------------------------
gcc/analyzer/ChangeLog | 9 ----
gcc/cp/ChangeLog | 12 -----
gcc/testsuite/ChangeLog | 45 -----------------
libstdc++-v3/ChangeLog | 8 ---
5 files changed, 200 deletions(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a2226e7..6987ba4 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -174,132 +174,6 @@
the previous comparison but aren't able to, use the new ccmp_rev
patterns instead.
-2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
- Sudakshina Das <sudi.das@arm.com>
-
- * config/arm/arm.md (ashldi3): Generate thumb2_lsll for both reg
- and valid immediate.
- (ashrdi3): Generate thumb2_asrl for both reg and valid immediate.
- (lshrdi3): Generate thumb2_lsrl for valid immediates.
- * config/arm/constraints.md (Pg): New.
- * config/arm/predicates.md (long_shift_imm): New.
- (arm_reg_or_long_shift_imm): Likewise.
- * config/arm/thumb2.md (thumb2_asrl): New immediate alternative.
- (thumb2_lsll): Likewise.
- (thumb2_lsrl): New.
-
-2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
- Sudakshina Das <sudi.das@arm.com>
-
- * config/arm/arm.md (ashldi3): Generate thumb2_lsll for TARGET_HAVE_MVE.
- (ashrdi3): Generate thumb2_asrl for TARGET_HAVE_MVE.
- * config/arm/arm.c (arm_hard_regno_mode_ok): Allocate even odd
- register pairs for doubleword quantities for ARMv8.1M-Mainline.
- * config/arm/thumb2.md (thumb2_asrl): New.
- (thumb2_lsll): Likewise.
-
-2020-01-17 Jakub Jelinek <jakub@redhat.com>
-
- * config/arm/arm.c (cmse_nonsecure_call_inline_register_clear): Remove
- unused variable.
-
-2020-01-17 Alexander Monakov <amonakov@ispras.ru>
-
- * gdbinit.in (help-gcc-hooks): New command.
- (pp, pr, prl, pt, pct, pgg, pgq, pgs, pge, pmz, ptc, pdn, ptn, pdd, prc,
- pi, pbm, pel, trt): Take $arg0 instead of $ if supplied. Update
- documentation.
-
-2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
-
- * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): Use the
- correct target macro.
-
-2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
-
- * config/aarch64/aarch64-protos.h
- (aarch64_sve_ld1ro_operand_p): New.
- * config/aarch64/aarch64-sve-builtins-base.cc
- (class load_replicate): New.
- (class svld1ro_impl): New.
- (class svld1rq_impl): Change to inherit from load_replicate.
- (svld1ro): New sve intrinsic function base.
- * config/aarch64/aarch64-sve-builtins-base.def (svld1ro):
- New DEF_SVE_FUNCTION.
- * config/aarch64/aarch64-sve-builtins-base.h
- (svld1ro): New decl.
- * config/aarch64/aarch64-sve-builtins.cc
- (function_expander::add_mem_operand): Modify assert to allow
- OImode.
- * config/aarch64/aarch64-sve.md (@aarch64_sve_ld1ro<mode>): New
- pattern.
- * config/aarch64/aarch64.c
- (aarch64_sve_ld1rq_operand_p): Implement in terms of ...
- (aarch64_sve_ld1rq_ld1ro_operand_p): This.
- (aarch64_sve_ld1ro_operand_p): New.
- * config/aarch64/aarch64.md (UNSPEC_LD1RO): New unspec.
- * config/aarch64/constraints.md (UOb,UOh,UOw,UOd): New.
- * config/aarch64/predicates.md
- (aarch64_sve_ld1ro_operand_{b,h,w,d}): New.
-
-2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
-
- * config/aarch64/aarch64-c.c (_ARM_FEATURE_MATMUL_FLOAT64):
- Introduce this ACLE specified predefined macro.
- * config/aarch64/aarch64-option-extensions.def (f64mm): New.
- (fp): Disabling this disables f64mm.
- (simd): Disabling this disables f64mm.
- (fp16): Disabling this disables f64mm.
- (sve): Disabling this disables f64mm.
- * config/aarch64/aarch64.h (AARCH64_FL_F64MM): New.
- (AARCH64_ISA_F64MM): New.
- (TARGET_F64MM): New.
- * doc/invoke.texi (f64mm): Document new option.
-
-2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
-
- * config/aarch64/aarch64.c (generic_tunings): Add branch fusion.
- (neoversen1_tunings): Likewise.
-
-2020-01-17 Wilco Dijkstra <wdijkstr@arm.com>
-
- PR target/92692
- * config/aarch64/aarch64.c (aarch64_split_compare_and_swap)
- Add assert to ensure prolog has been emitted.
- (aarch64_split_atomic_op): Likewise.
- * config/aarch64/atomics.md (aarch64_compare_and_swap<mode>)
- Use epilogue_completed rather than reload_completed.
- (aarch64_atomic_exchange<mode>): Likewise.
- (aarch64_atomic_<atomic_optab><mode>): Likewise.
- (atomic_nand<mode>): Likewise.
- (aarch64_atomic_fetch_<atomic_optab><mode>): Likewise.
- (atomic_fetch_nand<mode>): Likewise.
- (aarch64_atomic_<atomic_optab>_fetch<mode>): Likewise.
- (atomic_nand_fetch<mode>): Likewise.
-
-2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
-
-2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
-
- PR target/93133
- * config/aarch64/aarch64.h (REVERSIBLE_CC_MODE): Return false
- for FP modes.
- (REVERSE_CONDITION): Delete.
- * config/aarch64/iterators.md (CC_ONLY): New mode iterator.
- (CCFP_CCFPE): Likewise.
- (e): New mode attribute.
- * config/aarch64/aarch64.md (ccmp<GPI:mode>): Rename to...
- (@ccmp<CC_ONLY:mode><GPI:mode>): ...this, using CC_ONLY instead of CC.
- (fccmp<GPF:mode>, fccmpe<GPF:mode>): Merge into...
- (@ccmp<CCFP_CCFPE:mode><GPF:mode>): ...this combined pattern.
- (@ccmp<CC_ONLY:mode><GPI:mode>_rev): New pattern.
- (@ccmp<CCFP_CCFPE:mode><GPF:mode>_rev): Likewise.
- * config/aarch64/aarch64.c (aarch64_gen_compare_reg): Update
- name of generator from gen_ccmpdi to gen_ccmpccdi.
- (aarch64_gen_ccmp_next): Use code_for_ccmp. If we want to reverse
- the previous comparison but aren't able to, use the new ccmp_rev
- patterns instead.
-
2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
* gimplify.c (gimplify_return_expr): Use poly_int_tree_p rather
diff --git a/gcc/analyzer/ChangeLog b/gcc/analyzer/ChangeLog
index f6113a3..3e6e21b 100644
--- a/gcc/analyzer/ChangeLog
+++ b/gcc/analyzer/ChangeLog
@@ -14,15 +14,6 @@
than fold_build2 to avoid needlessly constructing a tree for the
non-const case.
-2020-01-17 David Malcolm <dmalcolm@redhat.com>
-
- PR analyzer/93281
- * region-model.cc
- (region_model::convert_byte_offset_to_array_index): Convert to
- ssizetype before dividing by byte_size. Use fold_binary rather
- than fold_build2 to avoid needlessly constructing a tree for the
- non-const case.
-
2020-01-15 David Malcolm <dmalcolm@redhat.com>
* engine.cc (class impl_region_model_context): Fix comment.
diff --git a/gcc/cp/ChangeLog b/gcc/cp/ChangeLog
index 8d10bbf..90665e1 100644
--- a/gcc/cp/ChangeLog
+++ b/gcc/cp/ChangeLog
@@ -46,18 +46,6 @@
* parser.c (cp_parser_template_name): Look up deprecated attribute
in DECL_TEMPLATE_RESULT or its type's attributes.
-2020-01-17 Jason Merrill <jason@redhat.com>
-
- PR c++/92531 - ICE with noexcept(lambda).
- * pt.c (uses_template_parms): Don't try to enumerate all the
- expression cases.
-
-2020-01-17 Jakub Jelinek <jakub@redhat.com>
-
- PR c++/93228
- * parser.c (cp_parser_template_name): Look up deprecated attribute
- in DECL_TEMPLATE_RESULT or its type's attributes.
-
2020-01-16 Jason Merrill <jason@redhat.com>
PR c++/93286 - ICE with __is_constructible and variadic template.
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 79a749e..cf60ff8 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -178,51 +178,6 @@
PR c++/93228
* g++.dg/cpp1y/attr-deprecated-3.C: New test.
-2020-01-17 Paolo Carlini <paolo.carlini@oracle.com>
-
- PR c++/92542
- * g++.dg/pr92542.C: New.
-
-2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
- Sudakshina Das <sudi.das@arm.com>
-
- * gcc.target/arm/armv8_1m-shift-imm_1.c: New test.
-
-2020-01-17 Mihail-Calin Ionescu <mihail.ionescu@arm.com>
- Sudakshina Das <sudi.das@arm.com>
-
- * gcc.target/arm/armv8_1m-shift-reg_1.c: New test.
-
-2020-01-17 Jonathan Wakely <jwakely@redhat.com>
-
- PR testsuite/93227
- * g++.dg/cpp0x/std-layout1.C: Use -Wno-deprecated-declarations for
- C++20, due to std::is_pod being deprecated.
-
-2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
-
- * gcc.target/aarch64/sve/acle/asm/ld1ro_f16.c: New test.
- * gcc.target/aarch64/sve/acle/asm/ld1ro_f32.c: New test.
- * gcc.target/aarch64/sve/acle/asm/ld1ro_f64.c: New test.
- * gcc.target/aarch64/sve/acle/asm/ld1ro_s16.c: New test.
- * gcc.target/aarch64/sve/acle/asm/ld1ro_s32.c: New test.
- * gcc.target/aarch64/sve/acle/asm/ld1ro_s64.c: New test.
- * gcc.target/aarch64/sve/acle/asm/ld1ro_s8.c: New test.
- * gcc.target/aarch64/sve/acle/asm/ld1ro_u16.c: New test.
- * gcc.target/aarch64/sve/acle/asm/ld1ro_u32.c: New test.
- * gcc.target/aarch64/sve/acle/asm/ld1ro_u64.c: New test.
- * gcc.target/aarch64/sve/acle/asm/ld1ro_u8.c: New test.
-
-2020-01-17 Matthew Malcomson <matthew.malcomson@arm.com>
-
- * gcc.target/aarch64/pragma_cpp_predefs_2.c: Check for f64mm
- predef.
-
-2020-01-17 Jakub Jelinek <jakub@redhat.com>
-
- PR c++/93228
- * g++.dg/cpp1y/attr-deprecated-3.C: New test.
-
2020-01-17 Richard Sandiford <richard.sandiford@arm.com>
* g++.target/aarch64/sve/acle/general-c++/gimplify_1.C: New test.
diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index 526983a..79bab71 100644
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -12,14 +12,6 @@
* libsupc++/new_opa.cc [!_GLIBCXX_HOSTED]: Declare allocation
functions if they were detected by configure.
-2020-01-17 Jonathan Wakely <jwakely@redhat.com>
-
- PR libstdc++/92376
- * include/bits/c++config: Only do PSTL config when the header is
- present, to fix freestanding.
- * libsupc++/new_opa.cc [!_GLIBCXX_HOSTED]: Declare allocation
- functions if they were detected by configure.
-
2020-01-16 Kai-Uwe Eckhardt <kuehro@gmx.de>
Matthew Bauer <mjbauer95@gmail.com>
Jonathan Wakely <jwakely@redhat.com>
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