[PATCH] RISC-V: add multiarch RVV support for memcpy using FMV IFUNC

[Andrew Waterman]

On Thu, Jan 16, 2025 at 1:31 AM 戴成荣 <daichengrong@iscas.ac.cn> wrote:
>
> With RISC-V GCC Function multi-versioning IFUNC support,glibc could utilize some new RISC-V CPUs with new extensions such as Vector to re-realize or speed up some functions like memcpy.
>
>
>
> Signed-off-by: daichengrong <daichengrong@iscas.ac.cn>
>
>
> ---
>
>  sysdeps/riscv/multiarch/memcpy_vector.S       | 36 +++++++++++++++++++
>  .../unix/sysv/linux/riscv/multiarch/Makefile  |  2 ++
>  .../unix/sysv/linux/riscv/multiarch/memcpy.c  |  5 +++
>  3 files changed, 43 insertions(+)
>  create mode 100644 sysdeps/riscv/multiarch/memcpy_vector.S
>
> diff --git a/sysdeps/riscv/multiarch/memcpy_vector.S b/sysdeps/riscv/multiarch/memcpy_vector.S
> new file mode 100644
> index 0000000000..92e2558cd1
> --- /dev/null
> +++ b/sysdeps/riscv/multiarch/memcpy_vector.S
> @@ -0,0 +1,36 @@
> +/* memcpy for RISC-V Vector.
> +   Copyright (C) 2024-2025 Free Software Foundation, Inc.
> +   This file is part of the GNU C Library.
> +
> +   The GNU C Library is free software; you can redistribute it and/or
> +   modify it under the terms of the GNU Lesser General Public
> +   License as published by the Free Software Foundation; either
> +   version 2.1 of the License, or (at your option) any later version.
> +
> +   The GNU C Library is distributed in the hope that it will be useful,
> +   but WITHOUT ANY WARRANTY; without even the implied warranty of
> +   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
> +   Lesser General Public License for more details.
> +
> +   You should have received a copy of the GNU Lesser General Public
> +   License along with the GNU C Library; if not, see
> +   <https://www.gnu.org/licenses/>.  */
> +
> +
> +#include <sysdep.h>
> +#include <sys/asm.h>
> +
> +ENTRY (__memcpy_vector)
> +    beq     a2, zero, L(ret)

This branch should be deleted; the strip-mine loop below does the
correct thing for a2=0.  Including the branch is an anti-optimization:
it speeds up the uncommon case of size-0 memcpy at the expense of the
common case.

>
> +    mv     a6, a0
> +L(loop):
> +    vsetvli a3,a2,e8,m8,ta,mu
> +    vle8.v  v8,(a1)
> +    vse8.v  v8,(a6)
> +    add     a1,a1,a3
> +    sub     a2,a2,a3
> +    add     a6,a6,a3
> +    bnez    a2,L(loop)
> +L(ret):
> +    ret
> +END (__memcpy_vector)
> \ No newline at end of file
> diff --git a/sysdeps/unix/sysv/linux/riscv/multiarch/Makefile b/sysdeps/unix/sysv/linux/riscv/multiarch/Makefile
> index fcef5659d4..a8b6c22af1 100644
> --- a/sysdeps/unix/sysv/linux/riscv/multiarch/Makefile
> +++ b/sysdeps/unix/sysv/linux/riscv/multiarch/Makefile
> @@ -3,7 +3,9 @@ sysdep_routines += \
>    memcpy \
>    memcpy-generic \
>    memcpy_noalignment \
> +  memcpy_vector \
>    # sysdep_routines
>
>  CFLAGS-memcpy_noalignment.c += -mno-strict-align
> +ASFLAGS-memcpy_vector.S += -march=rv64gcv
>  endif
> diff --git a/sysdeps/unix/sysv/linux/riscv/multiarch/memcpy.c b/sysdeps/unix/sysv/linux/riscv/multiarch/memcpy.c
> index 8544f5402a..c9879762f6 100644
> --- a/sysdeps/unix/sysv/linux/riscv/multiarch/memcpy.c
> +++ b/sysdeps/unix/sysv/linux/riscv/multiarch/memcpy.c
> @@ -32,11 +32,16 @@ extern __typeof (__redirect_memcpy) __libc_memcpy;
>
>  extern __typeof (__redirect_memcpy) __memcpy_generic attribute_hidden;
>  extern __typeof (__redirect_memcpy) __memcpy_noalignment attribute_hidden;
> +extern __typeof (__redirect_memcpy)  __memcpy_vector attribute_hidden;
>
>  static inline __typeof (__redirect_memcpy) *
>  select_memcpy_ifunc (uint64_t dl_hwcap, __riscv_hwprobe_t hwprobe_func)
>  {
>    unsigned long long int v;
> +  if (__riscv_hwprobe_one (hwprobe_func, RISCV_HWPROBE_KEY_IMA_EXT_0, &v) == 0
> +      && (v & RISCV_HWPROBE_IMA_V) == RISCV_HWPROBE_IMA_V)
> +    return __memcpy_vector;
> +
>    if (__riscv_hwprobe_one (hwprobe_func, RISCV_HWPROBE_KEY_CPUPERF_0, &v) == 0
>        && (v & RISCV_HWPROBE_MISALIGNED_MASK) == RISCV_HWPROBE_MISALIGNED_FAST)
>      return __memcpy_noalignment;
> --
> 2.25.1