Using __kuser_cmpxchg

[David Daney]

Nicolas Pitre wrote:
> On Thu, 15 Nov 2007, David Daney wrote:
> 
>> Paul Brook wrote:
>>>>>  > In the mean time you can work around it by using a mutex around the
>>>>>  > thread state modification instead of using cmpxchg on it.  Or if your
>>>>>  > platform is ARMv6 or higher then you won't get those spurious false
>>>>>  > negatives.
>>>>>
>>>>> Ah, OK, that's interesting: it sounds like you understand under what
>>>>> circumstances it may fail "spuriously".
>>>> Heh, I wrote that code (and comment).  :-)
>>>>
>>>>> What are these?
>>>> On a pre-ARMv6 processor
>>> Similar "spurious" failures can happen on ARMv6 processors.
>>>
>>> ARMv6 cpus don't have atomic operations either. They have ldrex/strex, where
>>> the latter will fail if another CPU modifies the memory *or* a context
>>> switch occurs.
>>>
>> This seems similar to MIPS ll/sc.  Perhaps if the arm port were modeled after
>> that.
> 
> It is when available.  But the ARM ll/sc instructions are available only 
> from architecture level 6, hence not available on many others.
> 

Similar issues exist with MIPS.  The MIPS Linux kernel emulates ll/sc 
via the illegal instruction trap if the cpu does not directly support it.

If the arm Linux port does (or was modified to do) likewise, we could 
then just always use the ldrex/strex.

David Daney