ARM: enable interpreter, add locks code

Andrew Haley aph-gcc@littlepinkcloud.COM
Thu Jul 12 10:30:00 GMT 2007


Daniel Jacobowitz writes:
 > On Wed, Jul 11, 2007 at 12:58:28PM -0700, David Daney wrote:
 > > Andrew Haley wrote:
 > > 
 > > > +/* Atomic compare and exchange.  These sequences are not actually
 > > > +   atomic; there is a race if *ADDR != OLD_VAL and we are preempted
 > > > +   between the two swaps.  However, they are very close to atomic, and
 > > > +   are the best that a pre-ARMv6 implementation can do without
 > > > +   operating system support.  LinuxThreads has been using these
 > > > +   sequences for many years.  */
 > > 
 > > Wow!  That is terrible.
 > 
 > Actually it works very well :-)
 > 
 > > Is there some way to do proper synchronization if the target CPU supports it?
 > 
 > You would have to configure gcc specifically for an armv6 or armv7
 > processor, or add relevant multilibs.

We could do that.  Do you have a pointer to the equivalent armv6 or
armv7 code?

Andrew.



More information about the Java-patches mailing list