PR java/22084 [4.1 Regression] Divide_1 test case hangs
Andrew Haley
aph@redhat.com
Thu Sep 8 16:57:00 GMT 2005
gcc at -O0 is now generating indexed loads for local variables via
register SP, rather than via BP as before. This is confusing the
disassembler in Java's divide overflow handler, which had never seen
such loads before. SP-indexed loads are 1 byte longer than BP-indexed
loads, so we need to increment PC.
Andrew.
2005-09-08 Andrew Haley <aph@redhat.com>
* include/i386-signal.h (HANDLE_DIVIDE_OVERFLOW): Bump IP by 1 if
R/M field in instruction is 100.
Index: i386-signal.h
===================================================================
RCS file: /cvs/gcc/gcc/libjava/include/i386-signal.h,v
retrieving revision 1.19
diff -u -2 -c -w -r1.19 i386-signal.h
cvs diff: conflicting specifications of output style
*** i386-signal.h 26 Sep 2004 20:38:48 -0000 1.19
--- i386-signal.h 8 Sep 2005 16:50:43 -0000
***************
*** 65,80 ****
&& ((_modrm >> 3) & 7) == 7) /* Signed divide */ \
{ \
_regs->edx = 0; /* the remainder is zero */ \
switch (_modrm >> 6) \
{ \
! case 0: \
! if ((_modrm & 7) == 5) \
_eip += 4; \
break; \
! case 1: \
_eip += 1; \
break; \
! case 2: \
_eip += 4; \
break; \
case 3: \
--- 65,87 ----
&& ((_modrm >> 3) & 7) == 7) /* Signed divide */ \
{ \
+ unsigned char _rm = _modrm & 7; \
_regs->edx = 0; /* the remainder is zero */ \
switch (_modrm >> 6) \
{ \
! case 0: /* register indirect */ \
! if (_rm == 5) \
_eip += 4; \
+ if (_rm == 4) /* A SIB follows the ModR/M byte */ \
+ _eip += 1; \
break; \
! case 1: /* register indirect + 8-bit displacement */ \
! _eip += 1; \
! if (_rm == 4) /* A SIB follows the ModR/M byte */ \
_eip += 1; \
break; \
! case 2: /* register indirect + 32-bit displacement */ \
_eip += 4; \
+ if (_rm == 4) /* A SIB follows the ModR/M byte */ \
+ _eip += 1; \
break; \
case 3: \
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