Partial vector

[Stefan Schulze Frielinghaus]

Hi all,

Is there some sort of guarantee that the unused part of a partial vector has
all bits set to zero?

The question came up while implementing an insn for mode V2SF on s390
where only half of the hard register would be utilized.  The final
machine instruction, however, would make use of the full register
(V4SF).  Therefore, if the other half is not guaranteed to be zero, then
a floating-point exception might occur in this particular case.  Of
course, if such a guarantee exists, then one would have to maintain that
for all insn implementations.

This all sounds a bit fragile and probably better solved by having some
sort of masking support by the hardware but I'm still keen to know.

Cheers,
Stefan