Urgent GCC ABI backend maintainer ping re zero width bitfield passing (PR102024)

[Richard Earnshaw]

On 25/03/2022 14:47, Jakub Jelinek via Gcc wrote:
> On Fri, Mar 25, 2022 at 02:26:56PM +0000, Richard Earnshaw wrote:
>> Just to confirm that this is our final position.  The 'int:0 field should be
>> ignored for the purposes of determining the parameter passing as it has no
>> effect on the layout of the type.
>>
>> We do not feel that an update to the AAPCS or AAPCS64 is needed as the
>> wording already covers this.
> 
> Ok.  So on the GCC side you need for both arm and aarch64 something similar
> to the r12-6418-g3159da6c46568a7c change (of course on the ARM/AArch64 side
> it will be in different spots etc.).
> But generally, if you see during TYPE_FIELDS walk for argument/return value
> passing decisions (both test whether something could be passed in registers
> or say alignment decisions for those) rather than layout
>    DECL_BIT_FIELD (field) && integer_zerop (DECL_SIZE (field))
> ignore it - if DECL_FIELD_CXX_ZERO_WIDTH_BIT_FIELD (field) then always,
> otherwise arrange for 2 invocations in which one ignores them and one
> doesn't and warns if the overall decisions change.
> 
> 	Jakub
> 

Do we really need two passes?  Surely, if we find a zero-width bitfield 
in the type we just set a marker to note that it was found.  If, at the 
end of walking the type, it's still a candidate for passing in FP regs, 
then we've identified an ABI change because previously we would not have 
behaved this way.

R.