ARM Cortex-R5F Support

[Kinsey Moore]

Hi,

I'm looking at working on Cortex-R5F support for RTEMS, but it seems as 
if latest GCC supports the Cortex-R5. This R5 has implicit FPU support 
which would make it really R5F. The ARM reference page on this core 
(https://developer.arm.com/Processors/Cortex-R5) specifies that the FPU 
is optional. I see that the FPU support can probably be disabled using 
the nofp option to achieve Cortex-R5 support, but I was wondering why 
this is handled differently from the Cortex-R4[F] support since that is 
broken out into two different CPU entries in gcc/config/arm/arm-cpus.in. 
It appears that R7 and R8 are handled the same way as R5.

Is the R4/R4F just the legacy way of handling this and R5/7/8 are the 
new way?


Thanks,

Kinsey