Lowest i386 CPU Model with proper C++ atomics

[Joel Sherrill]

On Fri, Sep 11, 2020 at 1:07 PM Florian Weimer <fw@deneb.enyo.de> wrote:

> * Joel Sherrill:
>
> > With that in mind, what's the lowest/oldest i386 CPU model we
> > should consider as the new base model?
>
> The 80486 has a CMPXCHG instruction (4-byte CAS).  Starting from CAS,
> you can build the rest.  There might be some caveats about the memory
> model implementation (it may not be as strongly ordered as the current
> i386 implementation, I haven't checked).
>

I guess that sets a baseline there if that's what would be used in gcc's
exception processing.

>
> The i386 does not have CAS, which is probably the problem you are
> referring to.  But on non-device memory, you can certainyl fake it if
> you are able to disable interrupts.
>

I don't know that we have a huge issue in making the i486 a minimum.
I was proposing a Pentium II or P6 as a baseline since that moves you
up to having a TBR and initial SMP support. But I think there are still
embedded x86 clones that I am not sure meet the P6 minimum.

--joel