cache optimization through samping hardware event

[Bin.Cheng]

On Tue, Nov 10, 2020 at 3:04 PM 172060045 <172060045@hdu.edu.cn> wrote:
>
> Hi,
>
> Recently, I was interested in GCC AutoFDO optimization, which works by sampling specific PMU event on production machines and using those profiles to guide optimization. In this way, information such as cache miss can also be obtained through sampling, so can we implement feedback-directed cache optimization according to this idea?
IIUC, the original AutoFDO doesn't do icache optimization based on
icache-miss perf data, but I think this is possible to do.  One point
is linker needs to be involved in order to reorder functions, not only
GCC itself.  Also TLB-miss might be handled too.

Thanks,
bin
>
> ARMv8.2 provides SPE features, which can obtain accurate LLC miss, TLB miss, branch miss and remote access information through perf, it may be helpful to the idea.
>
>
> Is any one doing relevant work?It would be grateful if someone could offer any advices, thx!