Matching and testing against smulhsm3
m
m@bitsnbites.eu
Sun Feb 9 11:15:00 GMT 2020
On 2020-02-07 16:44, Segher Boessenkool wrote:
> Hi!
>
> On Fri, Feb 07, 2020 at 03:41:25PM +0100, m wrote:
>> ...so I tried to write a corresponding matching pattern, like so:
>>
>> Â (define_insn "smulhshi3"
>> Â Â Â [(set (match_operand:HI 0 "register_operand" "=r")
>> Â Â Â Â Â (truncate:HI
>> Â Â Â Â Â Â Â (ashiftrt:SI
>> Â Â Â Â Â Â Â Â Â (mult:SI
>> Â Â Â Â Â Â Â Â Â Â Â (sign_extend:SI (match_operand:HI 1
>> "register_operand" "r"))
>> Â Â Â Â Â Â Â Â Â Â Â (sign_extend:SI (match_operand:HI 2
>> "register_operand" "r")))
>> Â Â Â Â Â Â Â Â Â (const_int 15))))]
>> Â "TARGET_PACKED_OPS"
>> Â "mulq.h\\t%0, %1, %2")
>>
>> However, I am unable to trigger this code path. I have tried with the
>> following C code:
>>
>> short mulq(short op1, short op2) {
>> Â return (short) (((int) op1 * (int) op2) >> (32 / 2 - 1));
>> }
>>
>> But I just get the regular 4-instruction result (2x sign extend, 1x mul,
>> 1x shift).
> What does -fdump-rtl-combine-all show it tried? *Did* it try anything?
>
>
> Segher
Cool option. I'm not really sure how to read the output tough. The
closest it seems to try to match is this:
Failed to match this instruction:
(set (reg:SI 85)
   (ashiftrt:SI (mult:SI (sign_extend:SI (subreg:HI (reg:SI 86) 0))
           (reg:SI 83 [ op2D.1381 ]))
       (const_int 15 [0xf])))
It seems that it has already decided to split the instruction into
several operations (the truncate operation is not there, and the second
sign_extend:SI (subreg:HI ...) is also missing).
/Marcus
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