Help with PR97872
Richard Biener
rguenther@suse.de
Tue Dec 1 11:09:19 GMT 2020
On Tue, 1 Dec 2020, Prathamesh Kulkarni wrote:
> Hi,
> For the test mentioned in PR, I was trying to see if we could do
> specialized expansion for vcond in target when operands are -1 and 0.
> arm_expand_vcond gets the following operands:
> (reg:V8QI 113 [ _2 ])
> (reg:V8QI 117)
> (reg:V8QI 118)
> (lt (reg/v:V8QI 115 [ a ])
> (reg/v:V8QI 116 [ b ]))
> (reg/v:V8QI 115 [ a ])
> (reg/v:V8QI 116 [ b ])
>
> where r117 and r118 are set to vector constants -1 and 0 respectively.
> However, I am not sure if there's a way to check if the register is
> constant during expansion time (since we don't have df analysis yet) ?
>
> Alternatively, should we add a target hook that returns true if the
> result of vector comparison is set to all-ones or all-zeros, and then
> use this hook in gimple ISEL to effectively turn VEC_COND_EXPR into nop ?
Would everything match-up for a .VEC_CMP IFN producing a non-mask
vector type? ISEL could special case the a ? -1 : 0 case this way.
> Thanks,
> Prathamesh
>
--
Richard Biener <rguenther@suse.de>
SUSE Software Solutions Germany GmbH, Maxfeldstrasse 5, 90409 Nuernberg,
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