GCC Compiler Optimization ignores or mistreats MFENCE memory barrier related instruction

[Umesh Kalappa]

Hi Alex ,

Agree that float division don't touch memory ,but fdiv  result (stack
register ) is stored  back to a memory i.e fResult .

So compiler barrier in the inline asm i.e ::memory should prevent the
shrinkage of  instructions like  "fstps   fResult(%rip)"    behind the
fence ?

BTW ,if we make fDivident  and  fResult = 0.0f  gloabls,the code
emitted looks ok  i.e
#gcc -S test.c -O3  -mmmx -mno-sse

       flds    .LC0(%rip)
        fsts    fDivident(%rip)
        fdivs   .LC1(%rip)
        fstps   fResult(%rip)
#APP
# 10 "test.c" 1
        mfence
# 0 "" 2
#NO_APP
        flds    fResult(%rip)
        movl    $.LC2, %edi
        xorl    %eax, %eax
        fstpl   (%rsp)
        call    printf

So i strongly believe that ,its compiler issue and please feel free
correct me in any case.

Thank you and waiting for your reply.

~Umesh




On Fri, Apr 13, 2018 at 5:58 PM, Alexander Monakov <amonakov@ispras.ru> wrote:
> On Fri, 13 Apr 2018, Vivek Kinhekar wrote:
>> The mfence instruction with memory clobber asm instruction should create a
>> barrier between division and printf instructions.
>
> No, floating-point division does not touch memory, so the asm does not (and
> need not) restrict its motion.
>
> Alexander