decrement_and_branch_until_zero pattern

Jim Wilson jimw@sifive.com
Fri Jun 8 22:40:00 GMT 2018


On Fri, Jun 8, 2018 at 1:12 PM, Paul Koning <paulkoning@comcast.net> wrote:
> Thanks.  I saw those sections and interpreted them as support for signal processor style fast hardware loops.  If they can be adapted for dbra type looping, great.  I'll give that a try.

The rs6000 port uses it for bdnz (branch decrement not zero) for
instance, which is similar to the m68k dbra.

> Meanwhile, yes, it looks like there is a documentation bug.  I can clean that up.  It's more than a few lines, but does that qualify for an "obvious" change?

I think the obvious rule should only apply to trivial patches, and
this will require some non-trivial changes to fix the looping pattern
section.  Just deleting the decrement_and_branch_until_zero named
pattern section looks trivial.  It looks like the REG_NONNEG section
should  mention the doloop_end pattern instead of
decrement_and_branch_until_zero, since I think the same rule applies
that they only get generated if the doloop_end pattern exists.

Jim



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