Inefficient code

[Paul Koning]

> On Jul 5, 2018, at 4:44 PM, Eric Botcazou <ebotcazou@adacore.com> wrote:
> 
> ...
> The GIMPLE pass responsible for the optimization simply punts for the "funny-
> endian ordering" of the PDP11.  More generally, you shouldn't expect anything 
> sparkling for such a peculiar architecture as the PDP11.

Ok.  Yet another item for the machine specific optimization pass (to be written).

So back to the previous one: anything I can do about a 24 bit field getting split into three movqi rather than a movqi plus a movhi?  That happens during RTL expand, I believe.

	paul