Validity of SUBREG+AND-imm transformations

[Kyrill Tkachov]

On 04/03/16 16:21, Jeff Law wrote:
> On 03/04/2016 08:05 AM, Richard Biener wrote:
>>> does that mean that the shift amount should be DImode?
>>> Seems like a more flexible approach would be for the midend to be able
>>> to handle these things...
>>
>> Or macroize for all integer modes?
> That's probably worth exploring.  I wouldn't be at all surprised if it that turns out to be better than any individual mode,  not just for arm & aarch64, but would help a variety of targets.
>

What do you mean by 'macroize' here? Do you mean use iterators to create multple variants of patterns with different
modes on the shift amount?
I believe we'd still run into the issue at https://gcc.gnu.org/ml/gcc/2016-03/msg00036.html.

> My worry is that such a change will bleeds out beyond just the standard shifting and shadd style patterns in each port.  I guess that would largely depend on how many combiner patterns a port has which combine a shift with some other 
> operation.
>

I see. For my purposes restricting this transformation to the cases where the shifted value is a REG seems to work ok,
so maybe we can avoid most side effects.

Kyrill

> jeff
>