Question on TARGET_MMX and X86_TUNE_GENERAL_REGS_SSE_SPILL

[Kumar, Venkataramanan]

Hi, 

X86_TUNE_GENERAL_REGS_SSE_SPILL: Try to spill general regs to SSE regs instead of memory.

I tried enabling the above tuning with -march=bdver4 -Ofast -mtune-ctrl=general_regs_sse_spill.
I did not find any code differences.

Looking at the below code to enable this tune,  mmx ISA needs to be turned off.

static reg_class_t
ix86_spill_class (reg_class_t rclass, machine_mode mode)
{
  if (TARGET_SSE && TARGET_GENERAL_REGS_SSE_SPILL && ! TARGET_MMX
      && (mode == SImode || (TARGET_64BIT && mode == DImode))
      && rclass != NO_REGS && INTEGER_CLASS_P (rclass))
    return ALL_SSE_REGS;
  return NO_REGS;
}

All processor variants enable MMX by default  and why we need to switch off mmx?

Thanks and regards,
Venkat.