[RFC] Cse reducing performance of register allocation with -O2

[Jeff Law]

On 10/22/2015 09:08 AM, Vladimir Makarov wrote:
> On 10/22/2015 06:05 AM, Dominik Vogt wrote:
>> On Tue, Oct 13, 2015 at 05:03:36PM -0400, Vladimir Makarov wrote:
>> [snip]
>>> I checked my article
>>>
>>> ftp://ftp.uvsq.fr/pub/gcc/summit/2004/Fighting%20Register%20Pressure.pdf
>>>
>>> and GVN gave mostly 0.2% on eon only.  The current environment is
>>> quite different (IRA, LRA) so the results might be different too.
>>>
>>> Also as I remember I implemented GVN only for pseudos.
>>>
>>> LRA also checks values too but again only for reload and original
>>> pseudos.
>> Do you still have the branches you've tested back then?  I'd
>> really like to try how this patch affects other targets (big
>> endian?).  Gcc seems to do a better job optimising code for x86 in
>> some complicated situations, so the extra logic might pay off more
>> on other targets.
>>
> No, sorry.  I can not find the code after 12 years since it was done. As
> I remember that time we even used cvs and there was no branch for the
> code.  That time the the development practice was different.  Even these
> days results of most modern research articles in CS can not be
> reproduced.  If I did such research today, I'd definitely put these code
> somewhere on github with detail instructions how to reproduce the results.
I don't even recall that work being on the Red Hat/Cygnus internal CVS repo.


>
> But even if I found the code, I guess it would be easier to write it
> from the scratch than make it working in the current environment.
Completely agree here.

jeff