[RFC] Cse reducing performance of register allocation with -O2

[Dominik Vogt]

On Tue, Oct 13, 2015 at 05:03:36PM -0400, Vladimir Makarov wrote:
[snip]
> I checked my article
> 
> ftp://ftp.uvsq.fr/pub/gcc/summit/2004/Fighting%20Register%20Pressure.pdf
> 
> and GVN gave mostly 0.2% on eon only.  The current environment is
> quite different (IRA, LRA) so the results might be different too.
> 
> Also as I remember I implemented GVN only for pseudos.
> 
> LRA also checks values too but again only for reload and original pseudos.

Do you still have the branches you've tested back then?  I'd
really like to try how this patch affects other targets (big
endian?).  Gcc seems to do a better job optimising code for x86 in
some complicated situations, so the extra logic might pay off more
on other targets.

Ciao

Dominik ^_^  ^_^

-- 

Dominik Vogt
IBM Germany