pre_modify/post_modify with scaled register

[Jeff Law]

On 05/17/2015 10:21 AM, Jon Beniston wrote:
> Hi,
>
> The gccint docs for pre_modify/post_modify say that the address modifier
> must be one of three forms:
>
> (plus:m x z), (minus:m x z), or (plus:m x i), where z is an index register
> and i is a constant.
>
> Why isnÂ’t (plus:m x (mult:m z i)) supported, for architectures that support
> scaling of the index register (E.g. ARM?)
>
>
>
> Compiling:
>
> int *f(int *p, int x, int z)
> {
>    p[z] = x;
>    return p + z;
> }
>
> For ARM results in:
>
>          str     r1, [r0, r2, asl #2]
>          add     r0, r0, r2, asl #2
>
> Rather than just:
>
>          str     r1, [r0, r2, asl #2]!
>
> Should this be improved by expanding what pre/post_modify supports, as
> above, or perhaps a peephole optimisation?
I don't think it was really considered with we added pre/post_modify a 
while back -- IIRC it was primarily driven by whatever port Michael 
Hayes was working on at the time plus the capabilities of PPC and HPPA 
at the time.

We'd certainly welcome patches to support scaling in the pre/post_modify 
addressing modes.

jeff