[RFC] Design for flag bit outputs from asms

H. Peter Anvin hpa@zytor.com
Mon May 4 20:42:00 GMT 2015

On 05/04/2015 01:35 PM, Linus Torvalds wrote:
> On Mon, May 4, 2015 at 1:14 PM, H. Peter Anvin <hpa@zytor.com> wrote:
>> I would argue that for x86 what you actually want is to model the
>> *conditions* that are available on the flags, not the flags themselves.
> Yes. Otherwise it would be a nightmare to try to describe simple
> conditions like "le", which a rather complicated combination of three
> of the actual flag bits:
>     ((SF ^^ OF) || ZF) = 1
> which would just be ridiculously painful for (a) the user to describe
> and (b) fior the compiler to recognize once described.
> Now, I do admit that most of the cases where you'd use inline asm with
> condition codes would probably fall into just simple "test ZF or CF".
> But I could certainly imagine other cases.

Yes, although once again I'm more than happy to let gcc do the boolean
optimizations if it already has logic to do so (which it might have/want
for its own reasons.)


More information about the Gcc mailing list