GCC 5 Status Report (2015-01-08), Stage 4 to start soon

[Jeff Law]

On 01/09/15 08:32, Joel Sherrill wrote:
> Piling on here. For RTEMS, we have 5 targets with GCC PRs reported.
> Ignoring the avr and m32c, we have arm, m68k and nios2 all with
> regressions since 4.9. I think these PRs are important enough
> that they should get consideration:
>
> +  arm: ICE GCC PR64460 segfault for -O2 and xscale
> + m68k: GCC PR64461 invalid code for all Coldfires
I can't really test coldfire, but Andreas's comment indicates we can 
just disable that pattern.

Feel free to assign it to me.  Not sure if it's strictly a regression, 
but I'd argue that it's broken enough to warrant fixing regardless of 
what stage we're in.  If indeed it's as simple as disabling that 
pattern, the chances for collateral damage are trivially small.

jeff