ira.c update_equiv_regs patch causes gcc/testsuite/gcc.target/arm/pr43920-2.c regression
Jeff Law
law@redhat.com
Sat Apr 18 10:20:00 GMT 2015
On 04/17/2015 03:57 AM, Shiva Chen wrote:
> Hi,
>
> I think the rtl dump in
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64916
> is not jump2 phase rtl dump.
>
> Because jump2 is after ira, the register number should be hardware
> register number.
>
> the jump2 rtl dump should as follow
>
> ...
> 31: NOTE_INSN_BASIC_BLOCK 5
> 32: [r6:SI]=r4:SI
> REG_DEAD r6:SI
> REG_DEAD r4:SI
> 33: [r5:SI]=r0:SI
> REG_DEAD r5:SI
> REG_DEAD r0:SI
> 7: r0:SI=0
> REG_EQUAL 0
> 85: use r0:SI
> 86: {return;sp:SI=sp:SI+0x18;r3:SI=[sp:SI];r4:SI=[sp:SI+0x4];r5:SI=[sp:SI+0x8];r6:SI=[sp:SI+0xc];r7:SI=[sp:SI+0x10];pc:SI=[sp:SI+0x14];}
> REG_UNUSED pc:SI
> REG_UNUSED r3:SI
> REG_CFA_RESTORE r7:SI
> REG_CFA_RESTORE r6:SI
> REG_CFA_RESTORE r5:SI
> REG_CFA_RESTORE r4:SI
> REG_CFA_RESTORE r3:SI
> 77: barrier
> 46: L46:
> 45: NOTE_INSN_BASIC_BLOCK 6
> 8: r0:SI=r4:SI
> REG_DEAD r4:SI
> REG_EQUAL 0xffffffffffffffff
> 87: use r0:SI
> 88: {return;sp:SI=sp:SI+0x18;r3:SI=[sp:SI];r4:SI=[sp:SI+0x4];r5:SI=[sp:SI+0x8];r6:SI=[sp:SI+0xc];r7:SI=[sp:SI+0x10];pc:SI=[sp:SI+0x14];}
> REG_UNUSED pc:SI
> REG_UNUSED r3:SI
> REG_CFA_RESTORE r7:SI
> REG_CFA_RESTORE r6:SI
> REG_CFA_RESTORE r5:SI
> REG_CFA_RESTORE r4:SI
> REG_CFA_RESTORE r3:SI
> 79: barrier
> 54: L54:
> 53: NOTE_INSN_BASIC_BLOCK 7
> 9: r0:SI=0xffffffffffffffff <== lost REG_EQUAL after patch
> 34: L34:
> 35: NOTE_INSN_BASIC_BLOCK 8
> 41: use r0:SI
> 90: {return;sp:SI=sp:SI+0x18;r3:SI=[sp:SI];r4:SI=[sp:SI+0x4];r5:SI=[sp:SI+0x8];r6:SI=[sp:SI+0xc];r7:SI=[sp:SI+0x10];pc:SI=[sp:SI+0x14];}
> REG_UNUSED pc:SI
> REG_UNUSED r3:SI
> REG_CFA_RESTORE r7:SI
> REG_CFA_RESTORE r6:SI
> REG_CFA_RESTORE r5:SI
> REG_CFA_RESTORE r4:SI
> REG_CFA_RESTORE r3:SI
> 89: barrier
Intead of the slim dump, can you please include the full RTL dump. I
find those much easier to read.
>
> Possible patch for can_replace_by in cfgcleanup.c.
>
> - if (!note1 || !note2 || !rtx_equal_p (XEXP (note1, 0), XEXP (note2, 0))
> - || !CONST_INT_P (XEXP (note1, 0)))
> +
> + if (!note1 || !CONST_INT_P (XEXP (note1, 0)))
> return dir_none;
>
> + if (note2)
> + {
> + if (!rtx_equal_p (XEXP (note1, 0), XEXP (note2, 0)))
> + return dir_none;
> + }
> + else
> + {
> + if (!CONST_INT_P (SET_SRC (s2))
> + || !rtx_equal_p (XEXP (note1, 0), SET_SRC (s2)))
> + return dir_none;
> + }
> +
>
> I'm not sure the idea is ok or it might crash something.
> Any suggestion would be very helpful.
Seems like you're on a reasonable path to me. I suggest you stick with it.
Basically what it appears you're trying to do is unify insns from
different blocks where one looks like
(set x y) with an attached REG_EQUAL note
And the other looks like
(set x const_int)
Where the REG_EQUAL note has the same value as the const_int in the
second set.
I think you'd want to handle both cases i1 has the note i2, no note and
i1 has no note and i2 has a note.
Jeff
jeff
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