Asm volatile causing performance regressions on ARM

Eric Botcazou ebotcazou@adacore.com
Fri Feb 28 09:24:00 GMT 2014


> Of course if the GIMPLE level doesn't care about the barrier then it doesn't
> make sense to be overly conservative at the RTL CSE level.  Thus I think we
> can just remove this barrier completely.

Not clear to me, what happens e.g. for register variables?

-- 
Eric Botcazou



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