[x86-64 psABI] RFC: Extend x86-64 PLT entry to support MPX
Ian Lance Taylor
iant@google.com
Wed Jul 24 16:45:00 GMT 2013
On Tue, Jul 23, 2013 at 12:49 PM, H.J. Lu <hjl.tools@gmail.com> wrote:
>
> http://software.intel.com/sites/default/files/319433-015.pdf
>
> introduces 4 bound registers, which will be used for parameter passing
> in x86-64. Bound registers are cleared by branch instructions. Branch
> instructions with BND prefix will keep bound register contents.
I took a very quick look at the doc. Why shouldn't we run the kernel
with BNDPRESERVE = 1, to avoid this behaviour of clearing the bound
registers on branch instructions? That would let us avoid these
issues.
> I prefer the note section solution. Any suggestions, comments?
I concur, but why not use the ELF attributes support rather than a new
note section?
Ian
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