ARM: gcc generates two identical strd instructions to store 8 bytes

[Nathanaël Prémillieu]

Le 26/06/2012 00:16, Michael Hope a écrit :
> On 26 June 2012 00:48, Nathanaël Prémillieu <npremill@irisa.fr> wrote:
>> Hi all,
>>
>> I am using the gcc ARM cross-compiler (gcc version 4.6.3 (Ubuntu/Linaro
>> 4.6.3-1ubuntu5)). Compiling the test.c code (in attachement) with:
>>
>> 'arm-linux-gnueabi-gcc -S test.c'
>>
>> I obtain the test.s assembly code (in attachement). At lines 56 and 57 of
>> the test.s there is two identical strd instructions:
>>
>> 56      strd    r2, [r7]
>> 57      strd    r2, [r7]
>>
>> I have checked the semantic of the ARM strd instruction and I have not seen
>> any side effect of this instruction that could explain why gcc need to put
>> this instruction two times in a row. For me, one is sufficient to store the
>> 8-bytes variable into memory.
>>
>> Is there an explanation?
>
> Hi Nathanaël.  Your question is more appropriate for the gcc-help
> list.  This list is about the development of GCC itself.

I do not ask for help, I just want to highlight what seems to me a 
strange behavior.

> You've built with optimisation turned off so GCC has generated correct
> but inefficient code.  The double store could be side effect of
> expanding the 64 bit multiply into the component 32 bit multiplies or
> the conditional.  Try building at -O or higher.

At higher optimization level, the store are eliminated.

> -- Michael
>