Difficulty matching machine description to target - any way to specify a minimum register width ?

[Paul S]

Thanks Richard,

The penny dropped when I read your comment about the % operator. item 
(2) send me back to the gcc internals document (again !) and I had the 
problem sorted in about half an hour.

Thanks again,
Paul.

On 06/01/12 08:23, Richard Henderson wrote:
> On 01/05/2012 10:33 PM, Paul S wrote:
>    
>> (define_insn "addqi3i"
>> [(set (match_operand:HI 0 "register_operand" "=r")
>> (plus:HI (match_operand:HI 1 "register_operand" "%0")
>> (sign_extend:HI (match_operand:QI 2 "memory_operand" "m"))))]
>>      
> Two things are wrong with this pattern:
>
>   (1) % is incorrect because the operands are not the same mode.
>       That's probably the root cause of all your failures.
>
>   (2) Embedded operands are canonically first in commutative operands.
>
> So this should be
>
>    [(set (match_operand:HI 0 "register_operand" "=r")
> 	(plus:HI (sign_extend:HI (match_operand:QI 1 "memory_operand" "m"))
> 		 (match_operand:HI 2 "register_operand" "0")))]
>
>
> r~
>
>
>