mips secondary reload question

[Amker.Cheng]

Hi:
  as to page http://gcc.gnu.org/ml/gcc/2010-05/msg00091.html,
If the fpu register can not copied to/from memory directly, I have
to use intermediate GPR registers.

In fact, I return GP_REGS if copying x to a register in class FP_REGS
in any mode(including CCmode), this results in infinite recursive calling
of memory_move_secondary_cost.

After tracing cc1, I found the calling sequence is like:

memory_move_secondary_cost (CCmode, ST_REGS, 1)  -->
memory_move_secondary_cost (CCmode, FP_REGS, 1)  -->
memory_move_secondary_cost (CCmode, ST_REGS, 1)  -->
memory_move_secondary_cost (CCmode, FP_REGS, 1)  -->
....... infinite recursive....

It seems function default_secondary_reload always use ST_REGS as intermediate
register for FP_REGS:CCmode according to reload_incc pattern.
This is all what i found, and I have totally no idea about how reload
pass works .

any explanation?

Thanks.

-- 
Best Regards.