vector register allocation
BLUE 3TOO
blue_3too@hotmail.com
Fri Jun 25 23:43:00 GMT 2010
Ian, thanks a lot for the help. Is there any document
about IRA (e.g. how the SIMD registers of a
specific architecture is exposed to the allocation
process)? or the only option is the read the code?
what is the best information source for a beginner on gcc?
Thanks again.
----------------------------------------
> From: iant@google.com
> To: blue_3too@hotmail.com
> CC: gcc@gcc.gnu.org
> Subject: Re: vector register allocation
> Date: Fri, 25 Jun 2010 14:38:19 -0700
>
> BLUE 3TOO writes:
>
>> Can anybody explain how the register allocation is handled in GCC?
>> Is it done together with the general register allocation? or GCC
>> has a separate phase to handle them separately?
>
> There is no separate vector register allocator. All classes of
> registers are allocated using the same register allocator. In current
> GCC we use IRA by Vladimir Makarov.
>
> Ian
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