pattern "s<code>_<mode>" not used when generating rtl for float comparison on mips?

[Paolo Bonzini]

On 04/27/2010 11:42 AM, Amker.Cheng wrote:
> Hi :
> There is a pattern "define_insn "s<code>_<mode>"" in mips md file, like
>
> (define_insn "s<code>_<mode>"
>    [(set (match_operand:CC 0 "register_operand" "=z")
> 	(swapped_fcond:CC (match_operand:SCALARF 1 "register_operand" "f")
> 		          (match_operand:SCALARF 2 "register_operand" "f")))]
>    ""
>    "c.<swapped_fcond>.<fmt>\t%Z0%2,%1"
>    [(set_attr "type" "fcmp")
>     (set_attr "mode" "FPSW")])
>
> I am wondering whether this insn pattern would ever be used when generating
> float comparison, Since we use cmp<mode>  and branch expand to do the job
> And comparison operation are normally followed by a branch.
> Am i right?

You can get the RTL for these patterns when expanding stores like

    a = (b < c);

In this case, GCC tries to avoid a conditional branch and (I suppose you 
are on GCC <4.5) instead of cmp<mode> and b<cond> you go through 
cmp<mode> and s<cond>.  cmp<mode> does nothing but stashing away its 
operands, while s<cond> expands RTL for both the comparison and the 
above insn.

For GCC >=4.5 there is no cmp<mode> anymore, and branches and store go 
through cbranch<mode>4 and cstore<mode>4 respectively.  The logic 
however is the same, with cstore<mode>4 emitting the RTL for both the 
comparison and the conditional store.

Hope this helps,

Paolo