Serious code generation/optimisation bug (I think)

[Robert Dewar]

Andy Armstrong wrote:

> The ARM exception table looks like this:
> 
> 0x00000000 Reset
> 0x00000004 Undefined instruction
> 0x00000008 Software interrupt
> 0x0000000C Prefetch Abort
> 0x00000010 Data Abort
> 0x00000014 Reserved
> 0x00000018 IRQ
> 0x0000001C FIQ
> 
> so only the reset vector is at 0.

Right, so the reset vector cannot be regarded as a legitimate
C object.
>