How to define 2 bypasses for a single pair of insn_reservation
Ye, Joey
joey.ye@intel.com
Wed Jan 7 06:39:00 GMT 2009
Vladimir Makarov [mailto:vmakarov@redhat.com] wrote:
> It was supposed to have two latency definitions at most (one in
> define_insn_reservation and another one in define_bypass). That time it
> seemed enough for all processors supported by GCC. It also simplified
> semantics definition when two bypass conditions returns true for the
> same insn pair.
>
> If you really need more one bypass for insn pair, I could implement
> this. Please, let me know. In this case semantics of choosing latency
> time could be
>
> o time in first bypass occurred in pipeline description whose condition
> returns true
> o time given in define_insn_reservation
Maxim and I encountered the same problem, and I believe we won't be the last two unlucky guys. Can you please implement the extended semantics, which looks good to me?
Thank s- Joey
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