A happy problem caused by loongson2f's div.g instruction

[Zhang Le]

On 19:18 Mon 10 Nov     , Zhang Le wrote:
> However, now I think adding a earlyclobber constraint may be the way to go.
> Since it is a less intrusive and more elegant (comparing with my patch above) change.

This solution is as easy as adding two bytes (two &s's) to the original patch:
@@ -11,7 +11,7 @@ Index: trunk/gcc/config/mips/loongson.md
 +;;new integer instructions
 +
 +(define_insn "<u>div<mode>3"
-+  [(set (match_operand:GPR 0 "register_operand" "=d")
++  [(set (match_operand:GPR 0 "register_operand" "=&d")
 +      (any_div:GPR
 +              (match_operand:GPR 1 "register_operand" "d")
 +              (match_operand:GPR 2 "register_operand" "d")))]
@@ -22,7 +22,7 @@ Index: trunk/gcc/config/mips/loongson.md
 +)
 +
 +(define_insn "<u>mod<mode>3"
-+  [(set (match_operand:GPR 0 "register_operand" "=d")
++  [(set (match_operand:GPR 0 "register_operand" "=&d")
 +      (any_mod:GPR
 +              (match_operand:GPR 1 "register_operand" "d")
 +              (match_operand:GPR 2 "register_operand" "d")))]

Zhang, Le