Basic block infrastructure after dbr pass

[Boris Boesler]

Am 18.03.2008 um 16:21 schrieb Jim Wilson:
> Boris Boesler wrote:
>>  The following code generators use FOR_EACH_BB[_REVERSE] in the  
>> target machine dependent reorg pass:
>>     - bfin
>>     - frv
>>     - ia64
>>     - mt
>>     - s390
>
> The very first thing that ia64_reorg does is
>   compute_bb_for_insn ();

  For a few seconds I thought you saved my day.

  I'm not talking about BLOCK_FOR_INSN (insn)

  I haven't specified my problem properly? If I traverse basic blocks  
via FOR_EACH_BB (used in compute_bb_for_insn, too) I get insns which  
are not in the insn-stream for(insn = get_insns(), insn; insn =  
NEXT_INSN(insn)) ..

     B1 -------> B2 ------> B3
     /\          /\         /\
    /  \        /  \       /  \
   v    v      v    v     v    v
  i1 -> i2    i3 -> i4   i5 -> i6
        |                 ^
        +-----------------+

  How can I say this? In a first pass I dump each insn as a node in a  
VCG-file, each node is identified by its memory address (I used the  
UID, but insns appear multiple times if they were copied, but UID or  
address makes no difference). In a second pass I dump each basic  
block as a node with edges to the head insn and to the end insn of  
the basic block, which should be emitted in the first pass. But  
sometimes some of the basic blocks have edges to insns which do not  
exits.

Possible solutions (from OK to horrific):
1) These insns are dead code.
2) Bug in my output (but I checked it quite often)
3) Bug in GCC

Boris