Allocating scratch register

[Paul Brook]

>   Yes, I can remember that constraints in a mov-insn can not be
> resolved by other/additional mov-insns.

I think you're doing this the wrong way. You don't have a i->m mov 
instruction, so why are you pretending you do?

Why aren't you doing this the same way as pretty much every other target? 
i.e.:

(define_insn "*movqi_insn"
   [(set (match_operand:QI 0 "reg_mem_operand" "=r,m")
        (match_operand:QI 1 "rim_operand"     " mi,r"))
 ""
 "mov %0,%1"
)

(define_expand "movqi"
  [(set (match...) (match...)]
 ""
 "
 if (GET_CODE (operands[0]) == MEM)
   operands[1] = force_reg (QImode, operands[1]);
  "
)

Plus the appropriate *_RELOAD_CLASS macros to keep reload happy.

Paul